Aggregate GHASH-Based MAC for Memory Error Correction
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Solution Overview
Problem
Current systems for managing data errors in memory devices face challenges such as high memory overhead, performance reduction, and increased costs due to the need for additional memory and complex management schemes, particularly when using aggregate GHASH-based message authentication codes (AMACs) for error detection and correction.
Innovation Solution
Implementing a single management memory device that combines error correction code (ECC) and metadata with a cryptographically strong aggregate GHASH-based message authentication code (AMAC) for error detection, location, and correction, allowing incremental updates over multiple cachelines without the need for excessive memory or bandwidth overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error correction techniques with sufficient parity bits are used to correct multiple bit errors or device failure, then reliability is improved, but memory overhead and device complexity increase significantly
Solution Approach 1:
The patent combines error correction code (ECC) and message authentication code (MAC) into a single integrated management structure. The ECC portion handles error correction while the MAC portion provides integrity verification, allowing both functions to share the same management memory device and reducing overall overhead compared to separate implementations.
Solution Approach 2:
The management memory device serves multiple functions: it stores ECC data for error correction, MAC data for integrity verification, and metadata for device management. This multi-functional approach eliminates the need for separate dedicated memory structures for each function, reducing total memory overhead.
2Reliability
If aggregate GHASH-based message authentication code (AMAC) is implemented for data integrity verification, then reliability is improved, but performance is reduced due to computational overhead
Solution Approach 1:
The AMAC value is computed and stored in advance during the write operation to memory. This preliminary computation allows the integrity verification to be performed quickly during read operations by simply comparing the stored AMAC with a newly computed AMAC, rather than performing complex GHASH computations during every read.
Solution Approach 2:
The patent stores a copy of the AMAC value in the management memory device alongside the encrypted data. This copied authentication value enables fast verification during read operations without requiring re-computation of the GHASH function, thus maintaining performance while ensuring integrity.
3Reliability
If complex management schemes are used to manage errors in memory devices, then reliability is improved, but device complexity and costs increase
Solution Approach 1:
The patent merges ECC management and MAC management into a single unified management memory device. This consolidation reduces the complexity of having separate management structures for error correction and integrity verification, while maintaining both capabilities through the integrated design.
Data Source
AI summary
Embodiments are directed to aggregate GHASH-based message authentication code (MAC) over multiple cachelines with incremental updates. An embodiment of a system includes a controller comprising circuitry, the controller to generate an error correction code for a memory line, the memory line comprising a plurality of first data blocks, generate a metadata block corresponding to the memory line, the metadata block comprising the error correction code for the memory line and at least one metadata bit, generate an aggregate GHASH corresponding to a region of memory comprising a cacheline set comprising at least the memory line, encode the first data blocks and the metadata block, encrypt the aggregate GHASH as an aggregate message authentication code (AMAC), provide the encoded first data blocks and the encoded metadata block for storage on a memory module comprising the memory line, and provide the AMAC for storage on a device separate from the memory module.