Aggregated Switch PBR Policy-Based Routing
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Solution Overview
Problem
Conventional Layer 3 routing techniques in aggregated networking devices, such as VLT peer devices, can lead to packet drops when egress ports become unavailable, as the chipset architecture may access VLT application and PBR tables simultaneously, preventing the utilization of VLT application entries that redirect packets over Inter-Chassis Links.
Innovation Solution
An Information Handling System with a Policy-Based Routing (PBR) engine that provides a first PBR entry to redirect packets via a second port in a Link Aggregation Group and detects unavailability, switching to a secondary PBR entry to redirect packets over an Inter-Chassis Link, ensuring continuous forwarding even when primary links become unavailable.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional L3 routing techniques are used to forward packets, then routing decisions are made automatically based on destination, but packets may be dropped when egress ports become unavailable and cannot be redirected through VLT domain
Solution Approach 1:
The system pre-configures Policy-Based Routing (PBR) entries in the PBR table with alternative egress ports before failures occur. When a primary egress port becomes unavailable, the PBR engine automatically detects the failure and switches to pre-planned alternative routes, ensuring continuous packet forwarding without manual intervention.
2Adaptability or versatility
If PBR entries redirect packets to specific egress ports, then routing policy compliance is improved, but reliability decreases when those egress ports become unavailable
Solution Approach 1:
The PBR engine dynamically monitors the availability status of egress ports and automatically adjusts routing decisions in real-time. When a primary egress port designated by PBR policy becomes unavailable, the system dynamically switches to alternative egress ports while maintaining compliance with routing policies, ensuring both policy adherence and reliable delivery.
3Reliability
If the system monitors egress port availability to prevent packet drops, then reliability is improved, but system complexity increases due to additional monitoring and switching logic
Solution Approach 1:
The patent combines port availability monitoring, failure detection, and routing decision-making into a single integrated PBR engine. This unified approach eliminates the need for separate monitoring systems and complex switching logic, as the PBR engine handles both policy-based routing and failure recovery in one centralized component, reducing overall system complexity.
4Reliability
If packets are redirected over ICL to peer device, then packet delivery reliability is improved, but latency increases due to additional hop through peer device
Solution Approach 1:
The system segments routing alternatives into hierarchical levels: primary direct paths through local egress ports, and secondary paths through ICL to peer devices. The PBR engine selectively uses ICL paths only when necessary (when primary paths fail), minimizing the use of longer routes and reducing overall latency while maintaining reliability.
Data Source
AI summary
An aggregated switch PBR system includes aggregated switches coupled together by an ICL and to a first core switch by a first LAG. A first aggregated switch includes a first link in the first LAG, and a second link to a second core switch. The first aggregated switch provides a first PBR entry in its PBR table that redirects packets initially provided for forwarding via the second link to the second core switch such that those packets are forwarded via the first link to the first core switch. When the first link becomes unavailable, the first aggregated switch provides a second PBR entry in its PBR table that redirects the packets initially provided for forwarding via the second link to the second core switch such that those packets are forwarded via the ICL to the second aggregated switch for transmission via the first LAG to the first core switch.