Aggregated Write Back in Direct Mapped Two Level Memory

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Solution Overview

Problem

Prior write back operations from a cache to storage can significantly delay other memory operations, impacting system performance due to the overhead of transferring dirty data from a near memory to a far memory, especially when multiple invalid blocks require replacement data from the far memory.

Innovation Solution

The implementation of aggregated write back logic that coordinates eviction and scrubbing of dirty data blocks in a near memory to aggregate spatially co-located blocks within a sector, reducing the number of write back operations to a far memory by direct mapping far memory addresses to corresponding near memory locations, thereby enhancing spatial locality and reducing memory operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If write back operations transfer dirty data from near memory to far memory in large units (sectors), then write operation overhead is reduced, but the time delay for write back operations increases significantly

Engineering Contradiction:
Improvewrite operation overheadVSAvoidwrite back operation time delay
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent segments the write back process into two distinct phases: (1) aggregation phase where multiple dirty blocks are collected and aggregated into a single sector for writing, and (2) execution phase where the aggregated sector is written to far memory. This segmentation allows the system to reduce overhead by batching operations while managing time delay through coordinated scheduling and phase separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary aggregation of dirty blocks into sectors before executing the actual write back operation. By pre-aggregating multiple dirty blocks into a single sector structure, the system prepares data in advance for efficient batch writing to far memory, reducing the number of separate write operations and their associated overhead.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple invalid blocks require replacement data from far memory, then data completeness is maintained, but the number of memory operations increases significantly

Engineering Contradiction:
Improvedata completenessVSAvoidnumber of memory operations
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges multiple separate memory operations into a single aggregated write back operation. Instead of performing individual read-modify-write cycles for each invalid block, the system aggregates all necessary data into a single sector and performs one coordinated write back operation, significantly reducing the total number of memory operations while maintaining data completeness.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The aggregated write back mechanism serves multiple functions simultaneously: it writes back dirty data, replaces invalid blocks, and coordinates sector-level operations. This multi-functional approach consolidates what would otherwise be multiple separate operations into a single universal write back process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If dirty data is evicted from near memory without aggregation, then eviction speed is maintained, but the impact on other memory operations increases

Engineering Contradiction:
Improveeviction speedVSAvoidsystem memory operation throughput
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent implements continuous aggregation of dirty blocks during the eviction process. Instead of immediate individual evictions, the system continuously collects and aggregates dirty blocks into sectors, maintaining eviction throughput while preparing data for batched write back operations, thereby reducing impact on other memory operations.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The system performs preliminary aggregation of dirty blocks during the eviction phase before executing the actual write back. This preliminary action allows the eviction process to maintain speed while preparing data in advance for efficient batched operations, reducing the impact on other memory operations during the write back phase.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10496544B2Aggregated write back in a direct mapped two level memory
Publication Date: 2019.12.03 INTEL CORP
  • US10496544B2 patent drawing
  • US10496544B2 patent drawing
  • US10496544B2 patent drawing

AI summary

In one embodiment, aggregated write back in a direct mapped two level memory in accordance with the present description, aggregates a dirty block or other subunit of data being evicted from a near memory of a two level memory system, with other spatially co-located dirty subunits of data in a sector or other unit of data for write back to a far memory of the two level memory system. In one embodiment, dirty spatially co-located subunits are scrubbed and aggregated with one or more spatially co-located dirty subunits being evicted. In one embodiment, a write combining buffer is utilized to aggregate spatially co-located dirty subunits prior to being transferred to a far memory write buffer in a write back operation. Other aspects are described herein.