On-Chip Aging Detection Circuit Using Frequency-Selective Signal Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for detecting circuit aging in electronic devices are inefficient and require external hardware resources, making them impractical and costly, as they struggle to accurately assess the aging level of circuits without significant hardware assistance.
Innovation Solution
An aging detection circuit configured on a chip, comprising a testing circuit and an aging signal generation circuit, which generates and selectively outputs input signals of different frequencies to simulate aging and detect the aging level by comparing initial and subsequent output signals, allowing for precise aging level assessment without external hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional external hardware resources are used to detect aging level, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The testing circuit performs self-testing by generating test signals and measuring its own output characteristics to detect aging levels, eliminating the need for external detection hardware. The circuit uses its existing functional blocks (signal generation unit, delay unit, logic gate unit) to conduct automated self-diagnosis of aging conditions.
Solution Approach 2:
The testing circuit is designed to perform multiple functions: it generates test signals, delays signals, performs logical operations, and detects aging levels all within the same circuit structure. This multi-functionality allows the circuit to serve both as a functional unit and a detection unit, reducing overall system complexity.
2Productivity
If operating voltage level is increased to maintain operating speed, then productivity is maintained, but power consumption and heat generation increase
Solution Approach 1:
The aging detection is performed proactively before the circuit's operating speed deteriorates to an unacceptable level. By detecting aging trends early, the system can plan voltage adjustments or maintenance activities in advance, avoiding the need for reactive high-voltage operations that consume excessive power.
Solution Approach 2:
The operating voltage level can be dynamically adjusted based on the detected aging level. Rather than maintaining a constantly high voltage to compensate for aging, the system adapts voltage levels according to actual circuit conditions, optimizing the balance between performance and power consumption over time.
3Measurement precision
If threshold voltage detection method is used to identify aging level, then measurement precision is improved, but device complexity increases due to additional measurement circuits
Solution Approach 1:
The testing circuit uses its own operational characteristics (output signal frequency, period, or duty cycle) as indirect indicators of aging level, rather than directly measuring threshold voltage. This self-service approach leverages existing circuit behavior to infer aging conditions without requiring specialized measurement equipment.
Solution Approach 2:
The patent uses intermediate parameters (output signal frequency, period, or duty cycle) as mediators to indirectly reflect the aging level. Instead of directly measuring the difficult-to-access threshold voltage, the system measures easily obtainable output characteristics that correlate with aging, simplifying the detection process.
Data Source
AI summary
An aging detection circuit is provided. The aging detection circuit is configured on a chip and includes a testing circuit and an aging signal generation circuit. The testing circuit is electrically coupled to the aging signal generation circuit. The testing circuit generates an output signal. The aging signal generation circuit includes a signal generation circuit and a selection circuit. The signal generation circuit generates multiple input signals having different frequencies. The selection circuit selectively outputs one of the input signals as an aging signal to an input terminal of the testing circuit or feeds back the output signal generated by the testing circuit to the input terminal of the testing circuit.


