Adaptive Aging-Tolerant Ring Oscillator Control for FinFET Overshoot

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Solution Overview

Problem

CMOS transistors in FinFET technologies experience enhanced aging degradation due to exposure to voltages beyond their operating limits, leading to rapid circuit degradation and device failure in stacked transistor configurations, where internal nodes are susceptible to transient overshoot voltages.

Innovation Solution

An adaptive aging tolerant circuit technique that adjusts configuration parameters such as power supply levels, frequency, and transistor design parameters to mitigate aging degradation, using an aging bias circuit to delay degradation and extend the operational life of digital and analog circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If stacked transistor configurations are used to achieve higher integration density, then circuit functionality is improved, but internal nodes are exposed to transient overshoot voltages beyond device limits causing accelerated aging degradation

Engineering Contradiction:
Improvecircuit functionalityVSAvoiddevice aging
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by proactively detecting voltage overshoot conditions before they cause irreversible damage. The aging detection circuit continuously monitors transistor health and predicts future degradation, enabling preventive maintenance actions to be taken before actual failure occurs, thus resolving the contradiction between maintaining high functionality and preventing aging-related reliability degradation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms where aging detection circuits provide real-time information about transistor degradation states back to the control logic. This feedback enables dynamic adjustment of operating parameters to prevent further degradation, allowing the system to maintain optimal performance while actively managing aging effects in stacked transistor configurations

Inventive Principle:
Principle #23Feedback

2Speed

If transistors are exposed to voltages beyond operating limits to maintain performance, then circuit performance is improved, but functional degradation and device failure occur at accelerated rates

Engineering Contradiction:
Improvecircuit performanceVSAvoiddevice lifetime
Core Design Contradiction:
SpeedVSDuration of action of moving object

Solution Approach 1:

The patent applies dynamics by making the circuit operating parameters adaptive rather than fixed. The system dynamically adjusts voltage levels and operating conditions based on real-time aging detection feedback, allowing the circuit to maintain optimal performance speed while automatically reducing stress on transistors when degradation is detected, thus extending device lifetime without permanently sacrificing performance

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements parameter changes by modifying operating voltage levels and other electrical parameters based on detected aging conditions. When aging is detected, the system changes operational parameters to reduce voltage stress on transistors, thereby slowing further degradation and extending device lifetime while maintaining acceptable performance levels

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10554209B2Adaptive aging tolerant apparatus
Publication Date: 2020.02.04 INTEL CORP
  • US10554209B2 patent drawing
  • US10554209B2 patent drawing
  • US10554209B2 patent drawing

AI summary

An apparatus is provided which comprises: a first ring oscillator comprising at least one aging tolerant circuitry; a second ring oscillator comprising a non-aging tolerant circuitry; a first counter coupled to the first ring oscillator, wherein the first counter is to count a frequency of the first ring oscillator; a second counter coupled to the second ring oscillator, wherein the second counter is to count a frequency of the second ring oscillator; and logic to compare the frequencies of the first and second ring oscillators, and to generate one or more controls to mitigate aging of one or more devices.