Adaptive Aging-Tolerant Ring Oscillator Control for FinFET CMOS
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Solution Overview
Problem
CMOS transistors in FinFET technologies experience enhanced aging degradation due to exponential voltage dependency, leading to functional degradation and device failure in stacked transistor configurations, where internal nodes are exposed to voltages beyond the device operating limits, resulting in faster degradation than anticipated.
Innovation Solution
An adaptive aging tolerant circuit technique that generates a configuration code to adjust parameters such as power supply levels, frequency, transistor sizing, and biasing to mitigate aging degradation, allowing digital and analog circuits to operate normally for a longer period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If stacked transistor configurations are used to increase circuit density, then productivity is improved, but reliability deteriorates due to voltage overshoot causing faster aging degradation
Solution Approach 1:
The patent implements dynamic voltage monitoring and adaptive body biasing that adjusts circuit parameters in real-time based on detected voltage conditions. The system transitions from static design to dynamic adaptation, sensing voltage overshoot events and responding with corrective body bias adjustments to mitigate aging degradation while maintaining stacked transistor density.
Solution Approach 2:
The patent changes physical parameters of the transistor (specifically body bias voltage) in response to detected voltage overshoot conditions. By dynamically adjusting the body bias parameter, the system compensates for voltage stress and slows aging degradation, allowing stacked transistor configurations to maintain both high density and improved reliability.
2Speed
If transistors are exposed to voltages beyond operating limits to achieve higher performance, then speed is improved, but duration of action deteriorates due to exponential voltage dependency of aging
Solution Approach 1:
The patent implements a feedback mechanism that continuously monitors voltage conditions across transistor nodes and uses this information to adjust body bias voltages. The feedback loop detects voltage overshoot events and triggers corrective actions proportional to the severity and duration of exposure, creating a closed-loop system that adapts to maintain transistor lifetime while allowing high-performance operation.
Solution Approach 2:
The patent applies preliminary protective action by pre-adjusting body bias voltages in anticipation of voltage stress conditions. When voltage overshoot is detected, the system immediately applies counteracting body bias adjustments before irreversible damage occurs, effectively neutralizing the harmful effects of high-voltage exposure on transistor lifetime.
3Reliability
If adaptive body biasing is applied to mitigate aging, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent implements self-service by enabling the circuit to automatically monitor its own voltage conditions and self-adjust its body bias voltages without external intervention. The aging mitigation system serves itself by detecting its own stress conditions and applying appropriate corrective actions, reducing the need for complex external control mechanisms while improving reliability.
Solution Approach 2:
The patent merges the voltage monitoring and body bias control functions into an integrated aging mitigation system. By combining multiple functions (voltage sensing, condition evaluation, and bias adjustment) into a unified control structure, the patent reduces overall system complexity compared to having separate independent systems for each function.
Data Source
AI summary
An apparatus is provided which comprises: a first ring oscillator comprising at least one aging tolerant circuitry; a second ring oscillator comprising a non-aging tolerant circuitry; a first counter coupled to the first ring oscillator, wherein the first counter is to count a frequency of the first ring oscillator; a second counter coupled to the second ring oscillator, wherein the second counter is to count a frequency of the second ring oscillator; and logic to compare the frequencies of the first and second ring oscillators, and to generate one or more controls to mitigate aging of one or more devices.