Index Data Register Pair for AHCI Real Mode Access

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Solution Overview

Problem

In real-mode operation, programs are limited to accessing only four AHCI registers due to the inability to access memory mapped I/O spaces above 1 MB, restricting the number of SATA devices that can be accessed during boot up or otherwise.

Innovation Solution

The use of an index-data register pair for indirect I/O addressing allows programs to access AHCI registers, enabling access to all AHCI registers by identifying an index/data pair in real-mode memory space, which is then forwarded to the AHCI registers located above 1 MB.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If memory mapped I/O spaces above 1 MB are used to access AHCI registers, then the number of accessible SATA devices increases from 4 to 32, but real-mode programs cannot access memory above 1 MB

Engineering Contradiction:

Improvenumber of accessible SATA devicesVSAvoidmemory accessibility in real mode

Core Design Contradiction:

Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent introduces an intermediary mechanism (port 0x1F0/0x1F2 or memory-mapped I/O space below 1 MB) that acts as a mediator between real-mode programs and AHCI registers above 1 MB. The program writes to this intermediary space, which then forwards the access to the actual AHCI registers, enabling indirect access without requiring direct memory access above 1 MB.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the addressing dimension by using port I/O space (another dimension of I/O addressing) instead of direct memory-mapped I/O space. By mapping AHCI registers through the I/O port space below 1 MB, the system enables access to devices that would otherwise be inaccessible in real mode, effectively adding another dimension to the addressing scheme.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If only IOBARs (0-4) are used for SATA device access in real mode, then memory allocation is simple, but the number of accessible devices is limited to 4

Engineering Contradiction:

Improvenumber of accessible devicesVSAvoidregister access mechanism

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes the I/O port space (0x1F0/0x1F2 or the intermediary memory-mapped space) universal by enabling it to access multiple AHCI registers beyond the traditional 4 devices. This single intermediary space serves multiple functions: it acts as a gateway for real-mode access, supports up to 32 devices, and maintains compatibility with existing real-mode programming models.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS7376782B2Index/data register pair for indirect register access

Publication Date: 2008.05.20 INTEL CORP

AI summary

A computer system provides a program access to a first register during real mode operation by using an index register and a data register, wherein the index register and the data register are located in real mode memory space and the first register is located outside of real mode memory space.