Cross-Platform AI Chip Driver Architecture with Shared Memory

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Solution Overview

Problem

Existing AI chip driver systems face inefficiencies and increased development costs due to the lack of a unified communication mode across various platforms, leading to significant overhead and reduced efficiency in data movement, particularly in applications with large data streams.

Innovation Solution

A driver system with a shared memory pool management layer, an application programming interface, and a hardware abstraction layer that provides a general interface for memory access, allowing efficient communication between upper applications and hardware devices, reducing data movement and enabling cross-platform compatibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a hardware device is configured with AI algorithms to perform large amounts of computing tasks, then computing power and processing capability are improved, but the need to design corresponding driver programs for various system platforms increases device complexity and development costs

Engineering Contradiction:
Improvecomputing powerVSAvoiddriver program complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent implements a unified driver architecture that can operate across multiple system platforms (Android, Linux, Windows) without requiring separate driver programs for each platform. The driver uses a standardized communication interface and memory management mechanism that is platform-agnostic, allowing the same driver binary to serve universal functionality across different operating systems, thereby eliminating the need for platform-specific driver development

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces a hardware abstraction layer that acts as an intermediary between the upper application layer and the hardware device. This abstraction layer standardizes the interface and communication protocols, isolating the hardware-specific details from the platform-specific operating system. The intermediary layer handles platform differences through standardized IPC mechanisms, reducing the complexity of designing platform-specific drivers

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If driver programs are designed for various system platforms and hardware devices, then platform compatibility is improved, but development time and maintenance costs increase

Engineering Contradiction:
Improveplatform compatibilityVSAvoiddevelopment time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The driver is designed with universal functionality that allows it to operate on multiple system platforms (Android, Linux, Windows) and support various hardware devices through a standardized interface. The unified architecture uses platform-independent IPC mechanisms and memory management, enabling a single driver implementation to serve multiple platforms without requiring separate development cycles for each platform

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The driver architecture is segmented into distinct layers: an upper application layer, a hardware abstraction layer, and a hardware device layer. The hardware abstraction layer contains platform-specific adaptations while the upper layers remain platform-independent. This segmentation allows platform compatibility to be achieved through modular adaptations rather than complete platform-specific driver development, significantly reducing development time and maintenance burden

Inventive Principle:
Principle #1Segmentation

3Reliability

If memory access is managed through traditional driver architectures, then system stability is maintained, but data movement overhead increases and efficiency decreases

Engineering Contradiction:
Improvesystem stabilityVSAvoiddata movement efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the memory management functionality from the traditional driver architecture and implements it as a separate, optimized memory allocation management layer. This layer directly manages the shared memory pool and provides efficient memory allocation to both upper applications and hardware devices, bypassing the need for excessive data copying through traditional driver interfaces. The extraction of memory management into a dedicated layer reduces overhead while maintaining system stability through controlled access mechanisms

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the memory allocation management layer with the hardware abstraction layer to create a unified memory management system. This merged architecture allows direct memory sharing between upper applications and hardware devices through a common memory pool, eliminating the need for separate data copying operations. The unified layer maintains system stability through standardized access protocols while significantly improving data movement efficiency by allowing direct memory access

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12373254B2Driver system, information processing method, electronic devicce and storage medium
Publication Date: 2025.07.29 GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP LTD
  • US12373254B2 patent drawing
  • US12373254B2 patent drawing
  • US12373254B2 patent drawing

AI summary

A drive system includes: an application programming interface layer of an upper-layer application, for providing a generic first application programming interface, and in the case that the upper-layer application requests access to a memory, receiving a first structure body fed back by a driver hardware abstraction layer; the driver hardware abstraction layer, for achieving the communication function of the first application programming interface to obtain memory information of the memory, and encapsulating the memory information to obtain the first structure body; a memory allocation management layer, for determining a target memory pool among shared memory pools, dividing the memory requested by the upper-layer application, and allocating the memory to the upper-layer application; an application programming interface layer of hardware, for obtaining the first structure body, obtaining the memory information, and transmitting the memory information to a hardware device.