AI Chip Firmware for Live Migration with Reduced Hypervisor Control

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Solution Overview

Problem

Existing methods for live migration on artificial intelligence chips require continuous hypervisor intervention and do not address maintaining partial system operation during migration, especially for SR-IOV devices, which are focused on network devices and implement migration control logic within the hypervisor layer, consuming dedicated CPU resources.

Innovation Solution

A system connected to a kernel space with hardware and ROM, where firmware virtualizes multiple virtual hardware components, enabling live migration by receiving activation requests, sending to-be-migrated data in batches, and sending end signals, utilizing SR-IOV technology for efficient resource sharing among virtual machines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hypervisor-based solutions with dirty memory tracking module are used to enable live migration, then live migration can be achieved without modifying guest operating systems, but continuous hypervisor intervention is required which consumes dedicated CPU resources

Engineering Contradiction:
Improvelive migration capabilityVSAvoidCPU resource consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements self-service by enabling virtual devices to perform their own migration through embedded firmware. The physical function in the firmware directly handles migration operations including receiving migration requests, tracking dirty pages, and transferring device state without requiring continuous hypervisor intervention, thus reducing CPU resource consumption while maintaining live migration capability

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent applies preliminary action by pre-configuring migration capability within the device firmware itself. The physical function is prepared in advance with all necessary migration logic and can autonomously execute migration operations when triggered, eliminating the need for real-time hypervisor involvement and reducing ongoing CPU resource requirements

Inventive Principle:
Principle #10Preliminary action

2Reliability

If SR-IOV virtualization is implemented to provide independent computation space for users, then service stability is improved, but live migration cannot be fully implemented on artificial intelligence chips

Engineering Contradiction:
Improveservice stabilityVSAvoidlive migration implementation
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent applies segmentation by separating migration functionality into independent firmware components within the SR-IOV virtualization framework. The physical function is divided into distinct modules including dirty page tracking, state saving, and migration coordination, allowing live migration to be implemented as an independent capability that works alongside SR-IOV virtualization without compromising service stability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses the firmware's physical function as an intermediary between the virtualized SR-IOV devices and the migration process. This intermediary layer handles migration operations transparently, enabling live migration on AI chips while maintaining the service stability provided by SR-IOV virtualization through coordinated state management

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If migration control logic is implemented within the hypervisor layer for network devices, then live migration is enabled, but device complexity increases and focuses only on network devices

Engineering Contradiction:
Improvelive migration enablementVSAvoidmigration control logic complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts migration control logic from the hypervisor layer and embeds it directly within the device firmware as a physical function. This extraction reduces hypervisor complexity and generalizes the solution beyond network devices to any virtualized device, as the migration capability becomes an intrinsic property of each device rather than a centralized hypervisor function

Inventive Principle:
Principle #2Taking out (Extraction)

4Reliability

If all migration control logic is implemented within the hypervisor layer, then live migration can be coordinated, but dedicated CPU resources are required during migration process

Engineering Contradiction:
Improvemigration coordinationVSAvoidCPU resource availability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements self-service by enabling virtual devices to perform their own migration through embedded firmware. The physical function in the firmware directly handles migration operations including receiving migration requests, tracking dirty pages, and transferring device state without requiring continuous hypervisor intervention, thus reducing CPU resource consumption while maintaining live migration capability

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP4148568B1Method for realizing live migration, chip, board, and storage medium
Publication Date: 2025.10.29 CAMBRICON (XIAN) SEMICON CO LTD
  • EP4148568B1 patent drawingFigure 1
  • EP4148568B1 patent drawingFigure 2
  • EP4148568B1 patent drawingFigure 3

AI summary

The present disclosure relates to a method, an apparatus and a readable storage medium for realizing live migration. A computation apparatus of the present disclosure is included in an integrated circuit apparatus, which includes a general interconnection interface and other processing apparatuses. The computation apparatus interacts with other processing apparatuses to jointly complete computation operations specified by users. The integrated circuit apparatus also includes a storage apparatus. The storage apparatus is respectively connected to the computation apparatus and the other processing apparatuses and is used for storing data of the computation apparatus and other processing apparatuses.