AI Chip Image Encoding via Segmentation and PCA
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Low-power integrated circuits used in mobile devices for voice and image recognition tasks face challenges due to limited resources, resulting in reduced data precision and accuracy compared to desktop or server processors, as they often have lower bit-width and resolution, leading to performance losses when transferring AI models.
Innovation Solution
The proposed solution involves encoding image data by resizing input images into smaller output images using methods such as image splitting or principal component analysis (PCA) to adapt to the hardware constraints of AI chips, allowing for loading and processing of lower precision or resolution data, and training convolutional neural networks within the AI chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If image data is processed using high precision and high resolution on desktop or server computers, then image recognition accuracy is improved, but device complexity and resource requirements increase
Solution Approach 1:
The patent divides the input image into multiple sub-images or patches, processes each patch separately through the neural network, and then combines the results. This segmentation allows the low-power chip to handle high-resolution images by breaking them into manageable pieces that fit within the chip's limited memory and processing capacity, thereby maintaining recognition accuracy without requiring increased chip size.
Solution Approach 2:
The patent transforms the spatial dimension problem by processing images in patches rather than as whole images. This dimensional transformation allows the system to effectively process high-resolution images on low-power chips by changing from a single large matrix operation to multiple smaller matrix operations, preserving accuracy while adapting to hardware constraints.
2Device complexity
If low-power chips use lower bit-width and resolution to reduce device complexity, then chip size and power consumption are reduced, but data precision and recognition accuracy deteriorate
Solution Approach 1:
The patent performs preliminary processing of the input image by dividing it into patches and preparing appropriate input representations before feeding them to the neural network on the low-power chip. This preliminary action ensures that the data is formatted in a way that maximizes the utilization of the chip's limited bit-width and resolution capabilities, thereby maintaining precision despite hardware constraints.
3Ease of operation
If AI models trained on high-resolution images are transferred to low-resolution integrated circuits, then device portability is improved, but recognition performance deteriorates
Solution Approach 1:
The patent applies segmentation to maintain recognition performance on portable devices by processing images in patches. This approach allows the model to effectively utilize the limited resolution of portable devices while maintaining accuracy, as each patch is processed with sufficient detail and the combined results preserve overall recognition performance.
Data Source
AI summary
Methods of encoding image data for loading into an artificial intelligence (AI) integrated circuit are provided. The AI integrated circuit may have an embedded cellular neural network for implementing AI tasks based on the loaded image data. An encoding method may apply image splitting, principal component analysis (PCA) or a combination thereof to an input image to generate a plurality of output images. Each output image has a size smaller than the size of the input image. The method may load the output images into the AI chip, execute programming instructions contained in the AI chip to generate an image recognition result based on the at least one of the plurality of output images, and output the image recognition result. The encoding method also trains a convolution neural network (CNN) and loads the weights of the CNN into the AI integrated circuit for implementing the AI tasks.