AI Chip Performance Prediction via Automated Code Transformation
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Solution Overview
Problem
The development of AI chip performance simulators is hindered by the complexity of AI chip design, requiring high professional expertise, consuming significant resources and time, and struggling with low accuracy and flexibility, as well as high version iteration costs.
Innovation Solution
A method and apparatus for testing AI chip computing performance by forming computing performance result data from simulation data, acquiring a function instruction set matched with a service function, and predicting computing time using a computing performance prediction model, thereby reducing the need for deep understanding of AI chip design and improving accuracy and flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If forward development method is used to create performance simulator according to hardware design and implementation mode, then the simulator can be developed, but it requires high professional level developers, consumes a lot of development resources and time
Solution Approach 1:
The patent uses code copying and transformation techniques to create the performance simulator. Instead of forward development from hardware specifications, the system automatically copies and transforms existing AI chip source code to generate simulator code, dramatically reducing development time and resource consumption while maintaining accuracy
Solution Approach 2:
The patent replaces the manual mechanical process of forward development with an automated code transformation system. The system automatically generates simulator code from AI chip source code through programmatic transformations, eliminating the need for manual development by high-level experts
2Adaptability or versatility
If forward development method is used to create performance simulator, then the simulator can be developed, but the flexibility of the simulator is relatively low and the cost of version iteration is relatively high
Solution Approach 1:
The patent creates a dynamic code transformation system that can adapt to different AI chip versions and configurations. The simulator generation process is made flexible through parameterized transformation rules that can be adjusted based on the target AI chip architecture, enabling easy version iteration and adaptation
Solution Approach 2:
The patent develops a universal code transformation framework that can generate simulators for different AI chip types and versions using the same base system. This multi-functional approach allows a single transformation engine to handle various chip architectures, improving flexibility and reducing version iteration costs
3Measurement precision
If forward development method is used to create performance simulator according to hardware design and implementation mode, then the simulator can be developed, but it is difficult to improve the accuracy of simulation results
Solution Approach 1:
The patent copies the actual AI chip source code to create the simulator, ensuring that the simulation logic directly reflects the real hardware behavior. This code-based copying approach preserves the accuracy of the original design while simplifying the development process, as the simulator inherits the precise implementation details from the source code
Data Source
AI summary
Provided are a method and an apparatus for testing AI chip computing performance, and a non-transitory computer-readable storage medium. The method includes: forming computing performance result data of a to-be-tested AI chip according to a plurality of items of simulation data formed in a development process of the to-be-tested AI chip; acquiring a function instruction set matched with a to-be-tested service function, wherein the function instruction set is composed of a plurality of instructions in a standard instruction set matched with the to-be-tested AI chip; and predicting computing time required by the to-be-tested AI chip to execute the to-be-tested service function according to the function instruction set and the computing performance result data.