AI Dataflow Super-Ops to Reduce Hardware Offload Overhead

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Solution Overview

Problem

Existing dataflow applications incur significant offload overhead when operators are offloaded to hardware accelerators due to passive operation and inefficient communication between host processing units and hardware accelerators.

Innovation Solution

A method and apparatus that combines operators into super-ops, utilizing a software compiler to analyze dataflow graphs, generate executable binary code segments, and dispatch these super-ops to hardware accelerators with navigation tables for autonomous execution, reducing offload overhead by minimizing communication between host and hardware.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If operators are offloaded to hardware accelerators for execution, then computational performance is improved, but offload overhead increases significantly

Engineering Contradiction:
Improvecomputational performanceVSAvoidoffload overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent combines multiple operators into a single super-operator that can be executed autonomously by the hardware accelerator. This merging eliminates the need for multiple separate offload operations, reducing communication overhead between the host processor and hardware accelerator while maintaining computational performance benefits.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The navigation table is pre-generated and embedded within the super-operator code during compilation. This preliminary action provides the hardware accelerator with all necessary execution information in advance, eliminating the need for runtime communication with the host processor and reducing offload overhead.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If operators are executed individually on hardware accelerators, then fine-grained control is maintained, but communication overhead between host and hardware increases

Engineering Contradiction:
Improvecontrol granularityVSAvoidcommunication overhead
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

Multiple fine-grained operators are merged into a single super-operator unit that retains internal structure and control logic. This allows the hardware accelerator to execute the combined operators autonomously without repeated host communication, reducing energy loss from communication while preserving operational control.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The navigation table acts as an intermediary that embeds control information within the super-operator code. This intermediary provides the hardware accelerator with all necessary control data in advance, eliminating the need for continuous host communication while maintaining fine-grained control over operator execution.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If multiple operators are combined into super-ops, then offload overhead is reduced, but navigation and control complexity increases

Engineering Contradiction:
Improveoffload overheadVSAvoidnavigation complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The navigation table is generated in advance during the compilation phase and embedded within the super-operator code. This preliminary organization of control information eliminates the need for complex runtime navigation logic, reducing offload overhead while managing navigation complexity through static analysis.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3991027B1Method and apparatus for enabling autonomous acceleration of dataflow ai applications
Publication Date: 2025.08.27 HUAWEI TECH CO LTD
  • EP3991027B1 patent drawingFigure 1
  • EP3991027B1 patent drawingFigure 2~3
  • EP3991027B1 patent drawingFigure 4

AI summary

A method includes analyzing a dataflow graph representing data dependencies between operators of a dataflow application to identify a plurality of candidate groups of the operators. Based on characteristics of a given hardware accelerator and the operators of a given candidate group of the plurality of candidate groups, determining whether the operators of the given candidate group are to be combined. In response to determining that the operators of the given candidate group are to be combined, retrieving executable binary code segments corresponding to the operators of the given candidate group, generating a unit of binary code including the executable binary code segments and metadata representing an execution control flow among the executable binary code segments, and dispatching the unit of code to the given hardware accelerator for execution of the unit of code.