AI-Guided Etching Recipe Control for Wafer Yield Stability

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Solution Overview

Problem

Challenges exist in achieving improved quality, yield, performance, and reliability while scaling down semiconductor devices, particularly due to issues during the fabrication process.

Innovation Solution

An etching system incorporating an artificial intelligence module that analyzes data from measurement modules to update etching, deposition, and implantation recipes on a wafer-to-wafer basis, ensuring parameters are within predetermined ranges.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If conventional fabrication processes are used for scaling down semiconductor devices, then device dimensions are reduced, but quality, yield, performance, and reliability deteriorate due to process variations

Engineering Contradiction:
Improvedevice dimensionsVSAvoidyield and reliability
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The patent implements a feedback control system where measurement modules measure wafer parameters after processing, and the AI module uses this feedback to dynamically adjust process recipes for subsequent wafers. This closed-loop feedback mechanism compensates for process variations and maintains high yield and reliability even as device dimensions scale down.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent transitions from static, pre-determined process recipes to dynamic, real-time recipe adjustment. The AI module continuously adapts process parameters based on measured wafer states, enabling the fabrication system to respond to variations and maintain consistency as devices are scaled down.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If conventional fabrication processes are used, then manufacturing complexity is reduced, but manufacturing precision deteriorates due to inability to correct process variations

Engineering Contradiction:
Improvefabrication process complexityVSAvoidwafer parameter precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The fabrication system performs self-correction by automatically adjusting process recipes based on real-time measurements. The AI module enables the system to self-diagnose deviations and self-correct by modifying subsequent process parameters, eliminating the need for external intervention while maintaining high manufacturing precision.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent dynamically changes process parameters (such as temperature, pressure, gas flow rates) based on measured wafer parameters. The AI module translates measurement data into optimized parameter adjustments, enabling precise control of fabrication processes despite inherent variations.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If real-time recipe updates are implemented using AI module, then yield and reliability are improved, but device complexity and automation extent increase

Engineering Contradiction:
Improvewafer yield and reliabilityVSAvoidfabrication system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The AI module serves multiple functions: it analyzes measurement data, determines optimal process adjustments, generates updated recipes, and controls process modules. This multi-functional integration reduces the need for separate control systems while improving yield and reliability through sophisticated real-time optimization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12412755B2Etching system for fabricating semiconductor device structure
Publication Date: 2025.09.09 NAN YA TECH
  • US12412755B2 patent drawing
  • US12412755B2 patent drawing
  • US12412755B2 patent drawing

AI summary

The present application discloses an etching system. The etching system includes an etch module executing a first etching recipe on a first wafer to turn a first wafer state of the first wafer to a second wafer state; a first measurement module collecting the second wafer state of the first wafer to generate a first set of data; and an artificial intelligence module coupled to the first measurement module and the etch module, analyzing the first set of data and update the first etching recipe to a second etching recipe when the first set of data is not within a predetermined range. The artificial intelligence module is configured for generating the second etching recipe taking into consideration at least one of an etching rate of the second wafer, a rate of rotation of the second wafer, and a tilt angle of the second wafer.