AI Processor Power Optimization Through Adaptive Operation Scheduling

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Solution Overview

Problem

Existing artificial intelligence (AI) processors face challenges in achieving high performance with optimal power consumption, leading to issues such as heat generation and increased costs due to high power consumption.

Innovation Solution

A method involving a compiler that translates AI models into executable operations based on power and performance parameters, configures the AI processor, processes data sets, generates power and performance data, and trains an AI algorithm to output optimized parameters for reduced power consumption, while dynamically controlling circuit block subsystems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the AI processor performs more parallel computations to achieve higher performance, then processing speed and throughput are improved, but power consumption increases

Engineering Contradiction:
Improveprocessing speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts the number of active computational units and parallel operation intensity based on real-time performance requirements and power constraints. The compiler generates multiple versions of computational kernels with different parallelism levels, and the runtime system selects appropriate versions based on current workload characteristics and power availability, enabling adaptive optimization of the performance-power tradeoff.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes key parameters such as the number of active processing units, iteration unrolling factors, and memory access patterns to optimize the balance between performance and power consumption. By systematically varying these parameters and measuring their impact on both metrics, the system identifies optimal configurations for different operational scenarios.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the processor increases computational throughput by activating more circuit blocks, then processing capacity is improved, but heat generation increases

Engineering Contradiction:
Improvecomputational throughputVSAvoidheat generation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The computational workload is divided into segments that can be processed by different circuit blocks. Instead of activating all blocks simultaneously, the system activates only the necessary segments based on the specific computational task and power/thermal constraints. This selective activation reduces overall heat generation while maintaining required computational throughput.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system employs periodic activation of computational resources, alternating between high-throughput modes and lower-power modes. By distributing computational intensity over time rather than concentrating it, the system reduces peak thermal loads while maintaining average performance requirements.

Inventive Principle:
Principle #19Periodic action

3Speed

If the compiler optimizes for maximum performance, then execution speed is improved, but power consumption increases

Engineering Contradiction:
Improveexecution speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The compiler generates code that uses partial activation of available computational resources rather than maximizing all resources simultaneously. By applying partial unrolling, partial vectorization, and selective activation of processing units, the system achieves sufficient execution speed while consuming less power than full optimization would require.

Inventive Principle:
Principle #16Partial or excessive action

4Productivity

If more parallel operations are performed, then processing capacity is improved, but device complexity increases

Engineering Contradiction:
Improveprocessing capacityVSAvoidcircuit block coordination
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The invention designs computational kernels that can be executed by the same circuit blocks regardless of the specific AI model or operation type. This universal approach allows parallel operations to be performed using a fixed set of hardware resources rather than requiring specialized circuit blocks for each operation, thereby increasing processing capacity without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12373018B2Power optimization in an artificial intelligence processor
Publication Date: 2025.07.29 GROQ INC
  • US12373018B2 patent drawing
  • US12373018B2 patent drawing
  • US12373018B2 patent drawing

AI summary

In one embodiment, the present disclosure includes a method of reducing power in an artificial intelligence processor. For each cycle, over a plurality of cycles, an AI model is translated into operations executable on an artificial intelligence processor. The translating is based on power parameters that correspond to power consumption and performance of the artificial intelligence processor. The AI processor is configured with the executable operations, and input activation data sets are processed. Accordingly, result sets, power consumption data, and performance data are generated and stored over the plurality of cycles. The method further includes training an AI algorithm using the stored parameters, the power consumption data, and the performance data. A trained AI algorithm outputs a plurality of optimized parameters to reduce power consumption of the AI processor. The AI model is then translated into optimized executable operations based on the plurality of optimized parameters.