AI Vector Compression Using Single-Bit XOR Transformation

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Solution Overview

Problem

Conventional AI models perform computationally intensive matrix multiplications, which are time-consuming and resource-heavy, often requiring graphical processing units, increasing execution costs.

Innovation Solution

Convert multi-bit components of vectors in AI models to single-bit elements using exclusive-or operations and random probability distributions to reduce computational complexity, enabling operations on central processing units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If matrix multiplication is performed using conventional AI models, then computational accuracy is maintained, but computational time and resource consumption increase substantially

Engineering Contradiction:
Improvecomputational accuracyVSAvoidcomputational time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent changes the parameter representation from multi-bit floating-point numbers to single-bit values (0 or 1). This parameter transformation fundamentally alters the computation from complex matrix multiplication to simpler operations, reducing computational time while maintaining accuracy through the specific design of the transformation and inversion processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the conventional mechanical matrix multiplication system with a transformed system using single-bit operations. The multi-bit components are transformed into single-bit representations, and the matrix multiplication operation is substituted with a transformed operation that can be performed using simpler computational mechanisms, enabling execution on standard processors

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Speed

If graphical processing units are used to perform matrix multiplication, then computational speed increases, but execution cost increases

Engineering Contradiction:
Improvecomputational speedVSAvoidexecution cost
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The patent replaces the requirement for specialized graphical processing units with standard central processing units by transforming the computational problem. The single-bit representation and transformed operations enable execution on general-purpose hardware, eliminating the need for expensive GPU infrastructure while maintaining acceptable computational speed

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent uses inexpensive single-bit values and simple transformation matrices instead of expensive multi-bit floating-point operations. This substitution allows the system to run on affordable standard processors rather than requiring costly specialized hardware, significantly reducing execution costs

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Device complexity

If multi-bit components are converted to single-bit elements, then computational complexity decreases, but information loss may occur

Engineering Contradiction:
Improvecomputational complexityVSAvoidinformation retention
Core Design Contradiction:
Device complexityVSLoss of information

Solution Approach 1:

The patent performs a preliminary transformation of multi-bit components into single-bit representations using a transformation matrix before the computational operations. This preliminary action preserves the essential information needed for accurate computation while reducing complexity, and the inversion process later restores the full precision if needed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter representation from multi-bit to single-bit while using a carefully designed transformation and inversion process. This parameter change reduces computational complexity but maintains information integrity through the reversible transformation, allowing accurate results to be obtained from simplified operations

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250363377A1Compressing and transforming vector operations in an ai model
Publication Date: 2025.11.27 MICROSOFT TECHNOLOGY LICENSING LLC
  • US20250363377A1 patent drawing
  • US20250363377A1 patent drawing
  • US20250363377A1 patent drawing

AI summary

Techniques are described herein that are capable of compressing and transforming vector operations in an AI model. First output multi-bit elements (MBEs) are generated by combining input single-bit components (SBCs) representing an input token in an AI prompt and first SBCs representing a first layer of the AI model using an exclusive-or operation. The first output MBEs are transformed into first output single-bit elements (SBEs) using a random probability distribution. Second output MBEs are generated by combining intermediate SBEs corresponding to intermediate MBEs derived from the first output SBEs and second SBCs representing a second layer of the AI model using the exclusive-or operation. A response to the AI prompt is generated to include an output token corresponding to a combination of a norm of the intermediate MBEs, a norm of second multi-bit components from which the second SBCs are derived, and a representation of the second output MBEs.