Antenna-in-Package Encapsulant Layout for Thin High-Performance Modules
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Solution Overview
Problem
Current antenna-in-package (AiP) modules face challenges in reducing size, improving performance, and increasing integration while maintaining reduced interface pitches, higher interface pin counts, and lower thickness.
Innovation Solution
The development of an improved AiP structure involves forming a semiconductor package with a high dielectric constant encapsulant over the antenna block and using modular interconnect structures, conductive pillars, or solder bumps for external interconnect, along with a shielding layer and thermal management options.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high dielectric constant encapsulant is used over antenna block, then antenna performance is enhanced, but manufacturing complexity increases
Solution Approach 1:
The encapsulant is segmented into two distinct regions: a first encapsulant material covering the semiconductor die and interconnect structures, and a second encapsulant material with higher dielectric constant specifically positioned over the antenna block. This segmentation allows optimization of antenna performance in the second region without compromising the protective and structural functions provided by the first encapsulant, thereby enhancing antenna performance while maintaining manageable manufacturing complexity through a systematic division of functional zones.
Solution Approach 2:
The patent applies local quality by using different encapsulant materials in different regions of the package. The second encapsulant material with higher dielectric constant is specifically applied only where needed (over the antenna block) to enhance antenna performance, while the first encapsulant material is used in other regions for structural support and protection. This localized application of enhanced dielectric properties improves antenna performance without requiring the entire package to use complex high-performance materials.
2Length of stationary object
If reduced thickness is implemented, then device size is reduced, but thermal management becomes more difficult
Solution Approach 1:
The patent addresses thermal management in reduced-thickness packages by transitioning from vertical heat dissipation to lateral heat spreading through the use of heat spreader layers and thermally conductive encapsulant materials. The heat spreader layers are positioned to conduct heat laterally away from hot spots, while the thermally conductive encapsulant materials provide continuous thermal pathways throughout the package structure. This dimensional approach to thermal management allows effective heat dissipation even when the package thickness is minimized.
3Volume of moving object
If higher integration is achieved, then device size is reduced, but interface pin count requirements increase
Solution Approach 1:
The patent implements nested doll principle through three-dimensional stacking of multiple semiconductor dies and functional layers within a compact package volume. Multiple dies are vertically stacked and interconnected through through-silicon vias and interconnect structures, allowing high integration density without proportionally increasing the package footprint. This vertical nesting approach maintains reduced device size while providing sufficient interface connectivity through the stacked architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance of antennae by using high dielectric constant materials, reduces costs through optimized encapsulant usage, and improves thermal management and electromagnetic interference protection.
Implementation Method 1
forming a semiconductor package with a high dielectric constant encapsulant over the antenna block
Data Source
AI summary
A semiconductor device has a substrate including an antenna formed in a first area of the substrate. A first electrical component is disposed over a second area of the substrate. A conductive pillar is disposed on the substrate adjacent to the first electrical component. A second electrical component is disposed on the conductive pillar and over the first electrical component. An interconnect structure is disposed over a third area of the substrate. A first encapsulant is deposited over the first electrical component and interconnect structure. A second encapsulant is deposited over the second electrical component. A third encapsulant is disposed over the antenna. The third encapsulant includes a higher dielectric constant than the first encapsulant and second encapsulant.