Air Core Inductor Fabrication with Varying Loop Thickness

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Solution Overview

Problem

Existing semiconductor technologies face challenges in optimizing air core inductors (ACIs) for smaller feature sizes, leading to increased resistive losses and reduced efficiency due to constrained inductor loop spacing and cross-sectional area, which limits both inductance and power delivery in densely packed devices.

Innovation Solution

The implementation of air core inductors with inductor loops of varying thicknesses, achieved through an over-plate etch back process, allows for a higher number of loops with smaller spacings and increased cross-sectional areas, enhancing inductance and efficiency by embedding ACIs in build-up layers of package substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If standard patterning process is used to form build-up layers, then manufacturing process is simple, but inductor loop spacing and cross-sectional area are constrained

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidinductor loop spacing control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a sacrificial mandrel structure before depositing the inductor loop material. The mandrel is created with specific dimensions and spacing, then the conductive material is deposited over it, and finally the mandrel is removed to leave precisely spaced inductor loops. This preliminary structuring enables controlled spacing that overcomes the limitations of standard patterning processes.

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If inductor loop cross-sectional area is increased, then resistive losses are reduced, but inductance decreases

Engineering Contradiction:
Improveresistive lossesVSAvoidinductance
Core Design Contradiction:
Loss of energyVSQuantity of substance

Solution Approach 1:

The patent transitions from two-dimensional planar inductor loops to three-dimensional vertically stacked inductor loops. Multiple loops are arranged in vertical layers, allowing the structure to achieve both larger effective cross-sectional area (reducing resistive losses) and greater total inductance through the stacked configuration. This dimensional change resolves the trade-off between loop thickness and inductance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If inductor loop spacing is reduced, then more loops can be packed, but manufacturing precision becomes more difficult

Engineering Contradiction:
Improvenumber of inductor loopsVSAvoidinductor loop spacing
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent introduces a sacrificial mandrel as an intermediary structure that enables precise spacing control. The mandrel acts as a template around which inductor loops are formed, ensuring consistent spacing between loops. After the loops are formed, the mandrel is removed, leaving the precisely spaced loop structure. This intermediary approach overcomes the spacing limitations of direct patterning methods.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11404389B2In-situ component fabrication of a highly efficient, high inductance air core inductor integrated into substrate packages
Publication Date: 2022.08.02 INTEL CORP
  • US11404389B2 patent drawing
  • US11404389B2 patent drawing
  • US11404389B2 patent drawing

AI summary

Embodiments include one or more air core inductors (ACIs) and a method of forming the ACIs. The ACI includes a first inductor loop on a substrate. The first inductor loop has a first line and a second line. The first line has a first thickness that is greater than a second thickness of the second line. The ACI also includes a dielectric over the substrate and the first and second lines. The first line has a top surface above a top surface of the second line. The ACI further includes a second inductor loop on the dielectric and the first inductor loop. The second inductor loop has is coupled to the top surface of the first line of the first inductor loop. The first inductor loop may also have a third thickness, where the third thickness is the distance between the top surfaces of the first and second line.