Air Gap Dielectric Layer Formation for Interconnect Capacitance Reduction
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Solution Overview
Problem
The semiconductor industry faces challenges with low-k dielectric materials, such as extreme low-k (ELK) and ultra low-k (ULK), which have reduced mechanical strength, lead to packaging issues like cracking and delamination due to thermal mismatch, and are costly with complex integration processes, and also impede thermal dissipation and reliability due to low thermal conductivity.
Innovation Solution
A method is introduced to form air gaps between interconnect lines by transforming a dielectric layer to create a protective dielectric layer and a capping layer, reducing capacitance while maintaining mechanical strength and reliability, using a self-aligned process that does not increase the number of photomasks or disturb existing damascene processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ELK dielectric materials are used to reduce interconnect capacitance, then capacitance is reduced, but mechanical strength decreases by 50%
Solution Approach 1:
The dielectric structure is segmented into multiple regions: ELK dielectric material in the trench for capacitance reduction, and a capping layer on top for mechanical strength. This segmentation allows each material to perform its optimal function without compromising the other.
Solution Approach 2:
The invention uses a composite dielectric structure combining ELK dielectric material with a capping layer made of different material (such as silicon oxide or silicon nitride). This composite approach allows the ELK material to provide low capacitance while the capping layer provides mechanical strength and thermal stability.
2Reliability
If ELK dielectric materials are used to reduce interconnect capacitance, then capacitance is reduced, but thermal mismatch causes cracking and delamination
Solution Approach 1:
The dielectric structure is segmented into ELK dielectric material in the trench and a separate capping layer on top. This segmentation isolates the ELK material from direct thermal stress with the package substrate, reducing thermal mismatch effects.
Solution Approach 2:
The capping layer acts as an intermediary between the ELK dielectric material and the package substrate. It provides a thermal buffer that reduces thermal mismatch stress, preventing cracking and delamination while allowing the ELK material to maintain its low capacitance properties.
3Reliability
If ELK dielectric materials are used to reduce interconnect capacitance, then capacitance is reduced, but integration process becomes complicated
Solution Approach 1:
The formation of the air gap and capping layer is merged with the existing damascene interconnect process. The capping layer is deposited conformally over the ELK dielectric and conductive fill in a single step, combining multiple functions into one process stage.
Solution Approach 2:
The self-aligned process uses the conductive interconnect lines as the pattern definition for the capping layer. The conformal deposition automatically creates the correct geometry without requiring additional photomasks or alignment steps, making the process self-defining and simplifying integration.
4Reliability
If ELK dielectric materials are used to reduce interconnect capacitance, then capacitance is reduced, but cost increases
Solution Approach 1:
The capping layer deposition is merged with the existing damascene process flow, eliminating the need for separate process modules. This integration reduces manufacturing complexity and cost while maintaining the capacitance reduction benefits of ELK dielectric material.
Solution Approach 2:
The capping layer serves multiple functions simultaneously: providing mechanical strength, reducing thermal mismatch stress, and enabling the air gap formation for capacitance reduction. This multi-functionality reduces the need for additional specialized process steps, lowering overall manufacturing cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces interconnect capacitance, maintains device and package reliability, and preserves ILD film strength, avoiding new thermal dissipation issues, all while keeping the same cost structure and using existing low-k/Cu baseline processes.
Implementation Method 1
chemically and/or mechanically changing the properties of a first dielectric layer locally, such that at least part of the first dielectric layer is converted locally and becomes etchable by a first etching substance
Implementation Method 2
The local conversion of the dielectric material may be achieved during anisotropic etching of the material in oxygen containing or fluorine containing plasma or ex-situ by performing an oxidizing step (e.g., a UV/ozone treatment or supercritical carbon dioxide with addition of an oxidizer)
Implementation Method 3
The local conversion of the dielectric material may be achieved during anisotropic etching of the material in oxygen containing or fluorine containing plasma
Data Source
AI summary
A method of forming a semiconductor structure includes providing a first dielectric layer with an opening above a substrate. An exposed surface portion of the first dielectric layer in the opening is transformed. A protective dielectric layer is formed along the transformed portion of the first dielectric layer. The opening is filled with a conductive material. The transformed portion of the first dielectric layer is removed to form an air gap between the protective dielectric layer and a remaining portion of the first dielectric layer.


