Air Gap Etching Control for Low-Capacitance Interconnects
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Solution Overview
Problem
As semiconductor devices shrink, RC delay due to wire capacitance becomes a limiting factor, necessitating low dielectric constant schemes between tightly spaced metal lines to enhance speed and reduce signal cross-talk, which existing methods fail to address effectively.
Innovation Solution
A method is developed to fabricate an air gap within inter-metal dielectric layers by adjusting etching time based on layer thickness, involving a substrate with semiconductor devices, stress, inter-layer, and etching stop layers, and forming trenches sealed with an insulating layer to reduce dielectric constant.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If air gap is formed by etching inter-metal dielectric layer, then dielectric constant is reduced, but trench depth control becomes critical to avoid damaging stress layers
Solution Approach 1:
An etching stop layer is introduced as an intermediary between the inter-metal dielectric layer and the stress layer. This stop layer prevents the etching process from penetrating too deeply and damaging the stress layer, while still allowing sufficient etching to form the air gap. The stop layer acts as a mediator that controls the etching depth without requiring precise control of the etching process itself.
Solution Approach 2:
The patent adjusts etching parameters (etching time, etching rate) based on the thickness of the inter-metal dielectric layer to optimize the air gap formation. By changing these parameters, the etching process can be controlled to create the desired air gap depth without compromising the underlying stress layer.
2Speed
If air gap depth is increased to reduce RC delay, then signal cross-talk is reduced, but manufacturing complexity increases
Solution Approach 1:
The etching stop layer simplifies the manufacturing process by providing a built-in depth reference that eliminates the need for complex real-time monitoring and control systems. This intermediary layer allows for deeper air gaps to be formed with standard etching equipment and processes, reducing the overall manufacturing complexity while achieving the desired signal transmission improvements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces dielectric constant, enhancing semiconductor device speed and minimizing signal cross-talk by creating uniform air gaps between metal interconnections, preventing trench depth issues that could damage stress layers.
Implementation Method 1
a first etching is performed to etch the inter-metal dielectric layer and the etching stop layer between the first metal interconnection and the second metal interconnection and directly on the semiconductor device. Then, a second etching is performed to etch the inter-layer dielectric layer without etching the stress layer to form a trench
Data Source
AI summary
A method of fabricating an air gap includes receiving a first thickness information of an inter-metal dielectric layer formed on a substrate and receiving a second thickness information of an inter-layer dielectric layer formed on the substrate. Then, a first etching is performed, wherein the first etching includes etch the inter-metal dielectric layer based on a first etching control value corresponding to the first thickness information. After the first etching, a second etching is performed to etch the inter-layer dielectric layer based on a second etching control value corresponding to the second thickness information.