Air-Gap Gate-All-Around Structure for Lower Capacitance Leakage
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Solution Overview
Problem
The integration of multi-gate devices in semiconductor manufacturing is challenging due to complexity and the need for improved gate control, reduced OFF-state current, and reduced short-channel effects.
Innovation Solution
The semiconductor structure incorporates channel structures vertically separated by a gate structure with air gaps and source/drain structures laterally separated by a first porous layer, utilizing a semiconductor stack with alternating layers of SiGe and silicon to enhance gate control and reduce capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multi-gate devices are integrated to improve gate control and reduce OFF-state current, then device performance is improved, but manufacturing complexity increases
Solution Approach 1:
The device is divided into multiple gates (first gate and second gate) that wrap around the channel from opposite directions. This segmentation allows independent control of different channel regions, improving overall gate control and reducing OFF-state current while maintaining manufacturability through modular fabrication processes
Solution Approach 2:
The multi-gate structure transitions from planar 2D gating to 3D wrap-around gating, where gates extend vertically and wrap around the channel in three dimensions. This dimensional change enhances gate-channel coupling and control without requiring complete redesign of the manufacturing workflow
2Productivity
If device dimensions are scaled down to improve production efficiency and lower costs, then productivity is improved, but manufacturing complexity increases
Solution Approach 1:
The channel is divided into multiple segments with individual gates (first gate on first sidewall, second gate on second sidewall). This segmentation enables continued scaling of device dimensions while maintaining control through multiple smaller gate structures rather than one large complex gate
Solution Approach 2:
Different gate structures are applied to different regions of the channel (first gate on first sidewall, second gate on second sidewall), allowing optimized control characteristics in different device regions while maintaining overall scalability and manufacturing efficiency
Data Source
AI summary
Semiconductor structures and method for forming the same are provided. The semiconductor structure includes channel structures vertically separated from each other and a gate structure wrapping around the channel structures. The semiconductor structure further includes a first porous layer formed over a first sidewall of the gate structure under the channel structures and a source/drain structure attached to the channel structures. In addition, the source/drain structure is laterally separated from the first porous layer by a first air gap.