3D Stacked Semiconductor Structure with Air-Gap Insulation

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Solution Overview

Problem

Conventional 3D semiconductor structures face issues with high capacitance between conductive layers and structural integrity, particularly when a large number of stacking layers are required, leading to bending or collapse.

Innovation Solution

The method involves forming a patterned multi-layered stack with alternately arranged insulating layers having air-gaps and conductive layers, reducing weight and capacitance by replacing polysilicon layers with insulating layers and nitride layers with conductive layers through linear spaces, while maintaining structural integrity and electrical reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If conventional 3D stacked semiconductor structure is used with solid insulating layers, then structural integrity is maintained, but capacitance between conductive layers is too high and weight is excessive

Engineering Contradiction:

Improvecapacitance between conductive layersVSAvoidstructural integrity

Core Design Contradiction:

Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent introduces air-gaps (porous structure) within the insulating layers to reduce capacitance between conductive layers. The air-gaps create a lower dielectric constant region, directly addressing the high capacitance issue while maintaining structural support through the surrounding solid insulating material framework.

Inventive Principle:

Principle #31Porous materials

Solution Approach 2:

The insulating layers are designed as composite structures combining solid insulating material with air-gaps. This composite approach allows the structure to simultaneously achieve low capacitance (through air-gaps) and structural integrity (through the solid insulating material framework).

Inventive Principle:

Principle #40Composite materials

2Quantity of substance

If larger number of stacking layers are required, then storage capacity is increased, but structure suffers from bending or collapsed problems

Engineering Contradiction:

Improvenumber of stacking layersVSAvoidstructural strength

Core Design Contradiction:

Quantity of substanceVSStrength

Solution Approach 1:

The air-gaps within insulating layers reduce the overall weight of the stacked structure. This weight reduction decreases the gravitational load on lower layers, preventing bending and collapse when stacking many layers, while still maintaining structural integrity through the distributed framework.

Inventive Principle:

Principle #31Porous materials

Solution Approach 2:

The insulating layers are segmented to contain air-gaps within them, creating a distributed lightweight framework. This segmentation allows the structure to maintain strength-to-weight ratio, enabling stable stacking of many layers without uniform weight distribution causing collapse.

Inventive Principle:

Principle #1Segmentation

3Area of stationary object

If larger array area is required, then storage capacity is increased, but capacitance between conductive layers gets worse

Engineering Contradiction:

Improvearray areaVSAvoidcapacitance between conductive layers

Core Design Contradiction:

Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The air-gaps within insulating layers provide a low dielectric constant region that reduces capacitance. This effect scales with array area, allowing larger storage capacities to be achieved without proportionally increasing capacitance issues, since the air-gap structure is distributed throughout the entire array area.

Inventive Principle:

Principle #31Porous materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the weight and capacitance of the 3D stacked semiconductor structure, enabling it to sustain more stacking layers with improved electrical characteristics and structural stability, suitable for large-scale applications without damaging related layers or components.

Implementation Method 1

the insulating layers are arranged alternately with the conductive layers haves air-gaps inside, so that the weight of the 3D stacked semiconductor structure can be reduced

Methodology Applied

Scientific EffectAir-gap structure: Porosity

Implementation Method 2

the insulating layers are arranged alternately with the conductive layers haves air-gaps inside, so that the capacitance between the conductive layers can be decreased

Methodology Applied

Scientific EffectAir-gap insulation: Dielectric Permittivity

Data Source

PatentUS10141221B1Method for manufacturing three dimensional stacked semiconductor structure and structure manufactured by the same

Publication Date: 2018.11.27 MACRONIX INTERNATIONAL CO LTD

AI summary

A method of manufacturing a three-dimensional (3D) stacked semiconductor structure is provided. A multi-layered stack is formed above a substrate, and the multi-layered stack comprises a plurality of nitride layers and polysilicon layers arranged alternately. Several channel holes are formed vertically to the substrate. The multi-layered stack is patterned to form linear spaces between the channel holes, wherein the linear spaces extend downwardly for being vertical to the substrate and to expose sidewalls of the nitride layers and the polysilicon layers. Then, the polysilicon layers are replaced with insulating layers having air-gaps through the linear spaces, and the nitride layers are replaced with conductive layers through the linear spaces.