Air Gap Interconnect Structure Preventing Conductive Feature Collapse

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor integrated circuits scale down, high aspect ratio features are prone to collapse during fabrication, leading to manufacturing challenges such as short circuits and defects due to weak structural integrity of small conductive features.

Innovation Solution

A method involving the formation of a conformal dense layer to provide structural support within recess cavities, followed by the deposition of a barrier layer and conductive features, and the creation of air gaps between them, using techniques like chemical vapor deposition and etching to prevent collapse and ensure reliable interconnects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If geometry size is scaled down to increase functional density, then production efficiency is improved and costs are lowered, but structural integrity of conductive features deteriorates leading to collapse

Engineering Contradiction:
Improveproduction efficiencyVSAvoidstructural integrity
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

A conformal dense layer is deposited onto the conductive features before subsequent fabrication steps. This preliminary structural reinforcement prevents collapse of high aspect ratio features during processing while allowing continued scaling for improved productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The conductive feature structure is combined with a conformal dense layer to create a composite structure. This composite provides both the electrical conductivity of the metal feature and the structural support of the dense layer, enabling scaled-down geometries without loss of integrity.

Inventive Principle:
Principle #40Composite materials

2Strength

If conformal dense layer is formed to provide structural support, then structural integrity is improved, but device complexity increases

Engineering Contradiction:
Improvestructural integrityVSAvoidprocessing complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The fabrication process is segmented into distinct steps: forming the conductive feature, depositing the conformal dense layer, and selective removal of the dense layer. This segmentation allows each step to be optimized independently, managing overall complexity while achieving structural integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The conformal dense layer acts as an intermediary material that temporarily provides structural support during fabrication. It can be selectively removed where not needed, serving as a sacrificial support structure that simplifies the overall process by preventing collapse without requiring complete redesign of the fabrication sequence.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The conformal dense layer prevents conductive feature collapse and barrier layer damage, reducing short circuits and defects, thereby enhancing the reliability and integrity of semiconductor devices.

Implementation Method 1

forming a conformal dense layer lining the at least first opening in the first dielectric layer

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Implementation Method 2

removing a portion of the first dielectric layer between any two adjacent conductive features to form a second opening

Methodology Applied
Scientific EffectEtching:

Implementation Method 3

depositing a second dielectric layer having an air gap between the first and second conductive features

Methodology Applied
Scientific EffectAir Gap:

Data Source

PatentUS9754882B2Interconnect structure having air gap and method of forming the same
Publication Date: 2017.09.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9754882B2 patent drawing
  • US9754882B2 patent drawing
  • US9754882B2 patent drawing

AI summary

A representative semiconductor device includes a first dielectric layer overlying a substrate, at least a first opening in the first dielectric layer, a conformal dense layer lining the at least first opening in the first dielectric layer, a barrier layer overlying the conformal dense layer, a conductive feature in the at least first opening, where a portion of the first dielectric layer between any two adjacent conductive features is removed to form a second opening, the second opening exposing the conformal dense layer between the two adjacent conductive features, and a second dielectric layer having an air gap formed therein, the second dielectric layer disposed between the two adjacent conductive features.