Air-Gap Interconnect Structure for RC Delay and Leakage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices evolve with smaller dimensions and increased density, issues such as increased capacitance, power consumption, and RC time constant arise due to capacitive coupling between conductive features, necessitating an improved device structure.
Innovation Solution
The implementation of a semiconductor device structure that includes air gaps between conductive features, formed using a sacrificial layer and support layer, along with a graphene layer to prevent oxidation and ensure proper etch stop layers, effectively reducing capacitive coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between conductive features is reduced to increase density, then the device functionality and density are improved, but the capacitance and capacitive coupling between conductive features increase
Solution Approach 1:
An air gap is introduced as an intermediary structure between adjacent conductive features. This air gap acts as a mediator that reduces the capacitive coupling between conductors by providing an insulating region with lower dielectric constant than traditional dielectric materials, thereby reducing the harmful capacitive effect while maintaining the reduced spacing for high density
Solution Approach 2:
The dielectric constant parameter of the material between conductive features is changed from high-k dielectric materials to air (k≈1). This parameter change fundamentally alters the capacitance relationship between adjacent conductors, reducing the capacitive coupling while allowing closer spacing between features
2Loss of energy
If air gaps are introduced to reduce capacitive coupling, then power consumption and RC time constant are reduced, but the device structure complexity increases
Solution Approach 1:
A sacrificial layer is deposited and patterned beforehand in the regions where air gaps are desired. This preliminary structure serves as a template that defines the air gap locations and dimensions, simplifying the subsequent air gap formation process and reducing overall process complexity
Solution Approach 2:
The sacrificial layer material is completely removed from the structure through etch processes, extracting the temporary support structure and leaving behind only the desired air gaps. This extraction eliminates the need for complex air gap maintenance structures throughout the device
3Object-generated harmful factors
If air gaps are formed between conductive features, then capacitive coupling is reduced, but structural integrity and protection against line-to-line leakage must be maintained
Solution Approach 1:
Different regions of the device structure are assigned different properties: air gaps are created only in specific locations between conductive features where capacitive coupling reduction is needed, while other regions maintain solid dielectric structures for mechanical support and electrical isolation. This localized approach maintains structural integrity while achieving the desired electrical performance
Data Source
AI summary
A method for forming an interconnect structure includes forming a first conductive layer over a dielectric layer, forming one or more openings in the first conductive layer to expose portions of dielectric surface of the dielectric layer and conductive surfaces of the first conductive layer, wherein the one or more openings separates the first conductive layer into one or more portions. The method includes forming a capping layer on exposed portions of the dielectric surface of the dielectric layer and conductive surface of the first conductive layer, forming a sacrificial layer in the one or more openings, recessing the sacrificial layer, forming a support layer on the recessed sacrificial layer in each of the one or more openings, removing the sacrificial layer to form an air gap in each of the one or more openings, forming a dielectric fill on the support layer, replacing the first conductive layer in the one or more openings with a second conductive layer, selectively forming a two-dimensional (2D) material layer on the second conductive layer, forming a first etch stop layer on the dielectric fill and the support layer, forming a second etch stop layer on the first etch stop layer and the 2D material layer, forming a dielectric material on the second etch stop layer, forming a contact opening through the dielectric material, the second etch stop layer, and the 2D material layer to expose a top surface of the second conductive layer, and forming a first conductive feature in the contact opening.