Air-Gap Interconnect Structure for Lower RC Delay
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Solution Overview
Problem
As semiconductor industry advances, the increasing density and decreasing dimensions of integrated circuits lead to increased capacitive coupling between conductive features, resulting in higher power consumption and longer RC time constants, which existing technologies have not adequately addressed.
Innovation Solution
The implementation of an interconnect structure that includes an air gap between conductive features, formed by a sacrificial layer and support layer, reduces capacitive coupling by creating a dielectric fill and etch stop layer with different etch selectivity, thereby minimizing line-to-line leakage and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between conductive features is decreased to increase density, then the device functionality and density are improved, but the capacitive coupling between conductive features increases
Solution Approach 1:
A low-k dielectric material is introduced as an intermediary substance between adjacent conductive features. This dielectric layer has a dielectric constant lower than conventional materials, which reduces the capacitive coupling effect while maintaining the reduced spacing between conductive features, thereby enabling higher density without proportionally increasing capacitive interference
Solution Approach 2:
The patent employs composite interconnect structures combining different materials with complementary properties. Specifically, copper or cobalt conductive features are combined with low-k dielectric materials (such as porous silicon oxide or carbon-doped silicon oxide) to create a composite system that achieves both high conductivity and low capacitive coupling
2Productivity
If the distance between conductive features is decreased to increase density, then the device functionality and density are improved, but the RC time constant increases
Solution Approach 1:
The patent changes the dielectric constant parameter of the insulating material by using low-k materials with dielectric constants significantly lower than conventional silicon dioxide. This parameter change directly reduces the capacitance component of the RC time constant, allowing faster signal propagation even at reduced feature spacing
Solution Approach 2:
Composite interconnect structures combining highly conductive materials (copper, cobalt) with low-k dielectric materials create a system where both resistance and capacitance are optimized, resulting in reduced RC time constants despite decreased feature dimensions and spacing
3Ease of manufacture
If conventional dielectric materials are used to insulate conductive features, then the manufacturing process is simple, but the capacitive coupling and power consumption increase
Solution Approach 1:
The dielectric constant parameter is reduced by employing low-k materials instead of conventional high-k dielectrics. This parameter change lowers the capacitance between conductive features, reducing the energy required to charge and discharge parasitic capacitances during switching operations, thereby reducing dynamic power consumption
Solution Approach 2:
Porous low-k dielectric materials are used to achieve lower effective dielectric constants. The porous structure reduces the density of polarizable atoms per unit volume, lowering the overall dielectric constant and thus the capacitive coupling, which reduces power consumption while maintaining manufacturability through established deposition and pore-filling processes
Data Source
AI summary
An interconnect structure includes a dielectric layer, a conductive feature, a conductive layer, a capping layer, a support layer and an etch stop layer. The conductive feature is disposed in the dielectric layer. A first portion of the conductive layer is disposed over the first conductive feature, and a second portion of the conductive layer is disposed over the dielectric layer. A first portion of the capping layer is in contact with the first portion of the conductive layer, a second portion of the capping layer is in contact with the second portion of the conductive layer, and a third portion of the capping layer is in contact with the dielectric layer. An air gap is defined by the support layer and the capping layer. The etch stop layer is disposed over the second portion of the conductive layer, the second portion of the capping layer and the support layer.


