Air Gap Interconnection Structure for Metal Lines

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Solution Overview

Problem

As semiconductor devices shrink in size, parasitic capacitances between metal lines increase, leading to higher power consumption and RC time constants, which existing low dielectric constant materials fail to adequately address.

Innovation Solution

An interconnection structure for metal lines featuring air gaps between conductive components, supported by a non-conductive side wall and covered by a supporting and covering layer, which reduces parasitic capacitance by utilizing the low dielectric constant of air.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the distance among semiconductor components is shortened to increase density, then the integration density is improved, but the parasitic capacitance among metal lines increases

Engineering Contradiction:
Improveintegration densityVSAvoidparasitic capacitance
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces air gaps (porous structures) between adjacent metal lines in the interconnection structure. Air has a dielectric constant of approximately 1.0, which is significantly lower than conventional dielectric materials (k>2.3). This porous configuration reduces the parasitic capacitance between adjacent conductive components while maintaining the shortened distance and high integration density required for modern semiconductor devices.

Inventive Principle:
Principle #31Porous materials

2Object-generated harmful factors

If conventional low dielectric constant materials are used to fill the space between conductive components, then the parasitic capacitance is reduced, but the dielectric constant is still too high to meet the requirements

Engineering Contradiction:
Improveparasitic capacitanceVSAvoiddielectric constant requirement
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent fundamentally changes the dielectric parameter by replacing solid dielectric materials with air gaps. The dielectric constant of air (k≈1.0) is the lowest possible value, dramatically reducing parasitic capacitance compared to conventional low-k materials (k>2.3). This parameter change achieves the required dielectric constant threshold that existing materials cannot meet.

Inventive Principle:
Principle #35Parameter changes

3Object-generated harmful factors

If air gaps are introduced between adjacent conductive components, then the parasitic capacitance is reduced, but the structural stability may be compromised

Engineering Contradiction:
Improveparasitic capacitanceVSAvoidstructural stability
Core Design Contradiction:
Object-generated harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent introduces supporting and covering layers as intermediary structures between the air gaps and the metal lines. These layers provide mechanical support and structural stability to the air gap configuration, preventing collapse while maintaining the low-dielectric-constant environment. The intermediaries enable the air gap structure to be mechanically viable for semiconductor manufacturing and operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces parasitic capacitance, mitigating RC delay issues and improving the performance of semiconductor devices by lowering the effective k-value of the interconnection structure.

Implementation Method 1

adjacent conductive components define an air gap therebetween... reduces parasitic capacitance by utilizing the low dielectric constant of air

Methodology Applied
Scientific EffectDielectric constant: Dielectric Permittivity

Data Source

PatentUS11183421B2Interconnection structure of metal lines, method of fabricating the same and semiconductor device
Publication Date: 2021.11.23 CHANGXIN MEMORY TECH INC
  • US11183421B2 patent drawing
  • US11183421B2 patent drawing
  • US11183421B2 patent drawing

AI summary

An interconnection structure for metal lines, a method of fabricating the same, and a semiconductor device are provided. A plurality of interconnection structure layers are stacked one above another on a substrate with the support of at least one supporting and covering layer. In each of the interconnection structure layers, spaces between a plurality of conductive components are filled with air which has a low dielectric constant, rather than with dielectric material. Thus, parasitic capacitances in the interconnection structure can be significantly reduced and RC delay can be mitigated.