Air Gap Isolation for High Density Non-Volatile Memory
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Solution Overview
Problem
As semiconductor memory devices evolve to increase storage capacity in smaller areas, they face challenges in electrical isolation between closely spaced components, leading to parasitic capacitances, unintended threshold voltage shifts, and reliability issues during write, erase, and read operations.
Innovation Solution
The introduction of air gaps in the column and row directions within the memory structure provides electrical isolation between components, using sacrificial materials and dielectric liners to form voids that reduce parasitic interferences and stabilize narrow patterns, while maintaining structural integrity and reducing post-etch chemistry concerns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory components are closely spaced to increase storage density, then storage capacity per area increases, but parasitic capacitances and electrical interference between components increase
Solution Approach 1:
The patent divides the continuous dielectric material into segmented sections by introducing air gaps between memory components. This segmentation electrically isolates adjacent components (such as control gates and floating gates) that are closely spaced, reducing parasitic capacitance while maintaining high storage density. The air gaps act as discrete insulating barriers between functional elements.
Solution Approach 2:
The patent introduces air gaps as intermediary elements between closely spaced memory components. These air gaps serve as mediating structures that provide electrical isolation without occupying significant space, allowing components to remain closely spaced for high density while preventing harmful electrical interference through the intervening air medium.
2Reliability
If air gaps are introduced to reduce parasitic capacitance, then electrical isolation improves, but fabrication process complexity increases
Solution Approach 1:
The patent incorporates air gap formation as an integrated part of the existing fabrication sequence, specifically utilizing the sacrificial material removal step that already occurs in the process flow. By timing the air gap creation to coincide with sacrificial material removal, the patent avoids adding separate dedicated air gap formation steps, thereby reducing overall process complexity while achieving the desired electrical isolation.
Solution Approach 2:
The patent makes the sacrificial material removal step serve dual functions: removing the sacrificial material used for pattern definition and simultaneously creating air gaps for electrical isolation. This multi-functionality reduces the total number of process steps required, as one operation achieves two objectives that would otherwise require separate steps.
3Reliability
If air gaps are formed using traditional sacrificial material removal, then electrical isolation is achieved, but post-etch chemistry concerns and structural instability increase
Solution Approach 1:
The patent introduces dielectric liners as intermediary protective layers that line the air gap regions. These liners provide structural support to narrow patterns adjacent to air gaps, preventing collapse or deformation during subsequent fabrication steps. The dielectric liners act as mediating structures that maintain the integrity of narrow features while allowing the air gaps to provide electrical isolation.
Solution Approach 2:
The patent applies dielectric liners to air gap regions before subsequent fabrication steps to provide protective cushioning. This beforehand protection prevents structural instability and pattern deformation that would otherwise occur during later processing, ensuring that narrow patterns remain stable throughout the remaining fabrication sequence.
Data Source
AI summary
Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Air gaps are formed at least partially in isolation regions between active areas of the substrate. The air gaps may further extend above the substrate surface between adjacent layer stack columns. A sacrificial material is formed at least partially in the isolation regions, followed by forming a dielectric liner. The sacrificial material is removed to define air gaps prior to forming the control gate layer and then etching it and the layer stack columns to form individual control gates and columns of non-volatile storage elements.