Air Gap Isolation for Semiconductor Memory Reliability

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Solution Overview

Problem

High-density integration in semiconductor memory devices leads to limitations in blocking electrical interference between memory cells, affecting the reliability of the devices.

Innovation Solution

The formation of air gaps between semiconductor memory devices using a capping layer and sacrificial layers, where the capping layer defines the upper surface of the air gap and is positioned higher than the semiconductor substrate, effectively minimizing interference by adjusting the height and position of the air gaps through simulation and manufacturing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If device separation film formed of insulating material is used to block interference between adjacent strings, then electrical interference blocking is provided, but as integration is increased the blocking capability deteriorates

Engineering Contradiction:
Improveinterference blocking capabilityVSAvoidintegration density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the harmful insulating material from the isolation region and replaces it with an air gap. The air gap is formed by removing the sacrificial layer after the capping layer is formed, creating a void space that provides superior electrical isolation between adjacent memory strings, thereby maintaining interference blocking capability at high integration densities

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the physical parameter of the isolation medium from solid insulating material to gaseous air. This parameter change transforms the isolation mechanism, as air provides better electrical insulation properties and allows for more effective interference blocking between closely spaced memory strings in high-density configurations

Inventive Principle:
Principle #35Parameter changes

2Reliability

If air gap is formed between memory devices to suppress interference, then reliability is enhanced, but device complexity increases due to additional manufacturing steps

Engineering Contradiction:
Improveinterference suppressionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the sacrificial layer and capping layer structure before finalizing the memory device fabrication. The sacrificial layer is deposited and patterned in advance, then the capping layer is formed over it. This preliminary structure enables subsequent air gap formation through simple sacrificial layer removal, avoiding the need for complex direct air gap fabrication processes

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses the sacrificial layer as an intermediary material that facilitates air gap formation. The sacrificial layer is temporarily introduced into the structure, covered by the capping layer, and then removed to create the air gap. This intermediary approach simplifies the overall process compared to attempting to directly form air gaps, as it uses standard deposition and removal techniques rather than requiring specialized void formation equipment

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9947543B2Semiconductor memory device and manufacturing method thereof
Publication Date: 2018.04.17 SK HYNIX INC
  • US9947543B2 patent drawing
  • US9947543B2 patent drawing
  • US9947543B2 patent drawing

AI summary

The present disclosure relates to a semiconductor memory, device and a method of forming a semiconductor memory device. The method of manufacturing a semiconductor memory device, includes forming a tunnel insulation layer and a floating gate on a semiconductor substrate of an active region, forming a trench in the semiconductor substrate of an isolation region, forming, in the trench, a sacrificial layer having an upper surface positioned higher than a surface of the semiconductor substrate, forming a capping layer over the sacrificial layer, and forming an air gap by removing the sacrificial layer without removing the capping layer.