Air Gap Dielectric for Semiconductor Memory Parasitic Capacitance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing integration of semiconductor memory devices leads to an interference phenomenon between conductive lines due to parasitic capacitance, causing a deterioration in threshold voltage distribution characteristics and reducing the yield of semiconductor memory devices.

Innovation Solution

The introduction of an air gap between conductive lines by forming a thin film pattern and filling the space with an insulating layer, thereby increasing the ratio of air-filled space and reducing the dielectric constant between the conductive lines, which minimizes the interference phenomenon.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the gap between conductive lines is reduced to increase integration density, then productivity is improved, but the interference phenomenon between conductive lines increases due to parasitic capacitance

Engineering Contradiction:
Improveintegration densityVSAvoidinterference phenomenon
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by creating a non-uniform dielectric structure where air gaps (low dielectric constant) are selectively positioned between specific conductive lines that generate significant parasitic capacitance. The air gap structure includes gaps between adjacent conductive lines and gaps between conductive lines and ground electrodes, providing localized reduction of parasitic capacitance where most needed while maintaining overall high integration density.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the dielectric parameter (dielectric constant) between conductive lines by introducing air gaps. The dielectric constant of air is approximately 1.0, which is significantly lower than conventional dielectric materials. This parameter change directly reduces parasitic capacitance and the interference phenomenon while allowing conductive lines to be positioned closer together for higher integration.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If conventional dielectric materials are used between conductive lines, then manufacturing precision is maintained, but the interference phenomenon increases due to higher dielectric constant

Engineering Contradiction:
Improvegap formation precisionVSAvoidparasitic capacitance
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent changes the dielectric parameter by replacing conventional dielectric materials with air gaps. The dielectric constant of air (approximately 1.0) is significantly lower than that of conventional dielectric materials, directly reducing parasitic capacitance and interference phenomenon while maintaining manufacturing precision through controlled formation of the air gap structure.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts the dielectric material from between conductive lines and replaces it with air gaps. This removal of material that generates parasitic capacitance is achieved through a formation process that creates voids or gaps filled with air, thereby eliminating the source of interference while maintaining structural integrity.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the interference between conductive lines, improving the threshold voltage distribution characteristics and enhancing the yield of semiconductor memory devices by increasing the proportion of air-filled space with a lower dielectric constant compared to the insulating layer.

Implementation Method 1

increasing the ratio of air-filled space and reducing the dielectric constant between the conductive lines, which minimizes the interference phenomenon

Methodology Applied
Scientific EffectDielectric constant: Dielectric Permittivity

Data Source

PatentUS20140154866A1Method of Forming a Semiconductor Memory Device
Publication Date: 2014.06.05 SK HYNIX INC
  • US20140154866A1 patent drawing
  • US20140154866A1 patent drawing
  • US20140154866A1 patent drawing

AI summary

A semiconductor memory device includes a semiconductor substrate defining active regions partitioned by an isolation region, conductive lines spaced apart from each other and crossing the active regions over the semiconductor substrate, a thin film pattern formed on a top portion of the conductive lines having opening portions exposing part of the conductive lines in a width wider than a width of the conductive lines, an insulating layer filling the opening portions and formed over the thin film pattern, and an air gap formed between the conductive lines below the insulating layer and the thin film pattern.