Air Gap Formation in IC Metallization via Selective Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increased circuit density in modern integrated circuits leads to signal propagation delays due to high line-to-line capacitance and resistance in metallization layers, making it challenging to form effective air gaps in these layers using traditional techniques.
Innovation Solution
The method involves forming laterally spaced-apart trenches in an insulating material, selectively damaging adjacent portions to create air gaps by selective etching, and forming conductive lines within these trenches, followed by a capping layer to define and maintain the air gaps, reducing capacitive coupling and leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional air gap formation techniques are used, then manufacturing simplicity is maintained, but the air gaps cannot be effectively formed due to high circuit density and small feature sizes
Solution Approach 1:
The patent applies preliminary action by performing a damage-causing process on portions of the insulating material adjacent to the trenches before forming the air gaps. This pre-damaging step creates selectively removable regions that will later become air gaps, allowing precise control over gap formation despite high circuit density and small feature sizes that make traditional techniques ineffective
Solution Approach 2:
The patent applies local quality by selectively damaging only specific portions of the insulating material adjacent to the trenches, while leaving other portions intact. This creates spatially varying properties in the insulating material, enabling selective removal of damaged portions to form air gaps in precise locations while maintaining structural integrity elsewhere
2Productivity
If circuit density is increased to improve packing, then chip area utilization improves, but parasitic RC time constants and capacitive coupling increase causing signal propagation delays
Solution Approach 1:
The patent applies the taking out principle by extracting material from the insulating layers adjacent to conductive lines to create air gaps. These air gaps remove dielectric material that would otherwise contribute to parasitic capacitance, thereby reducing capacitive coupling between adjacent lines and improving signal propagation performance while maintaining high packing density
Solution Approach 2:
The patent creates a porous structure by forming air gaps (voids) in the insulating material between conductive lines. These air gaps act as low-k dielectric regions that reduce parasitic capacitance and improve electrical performance, effectively using a porous configuration to mitigate the harmful effects of high circuit density
3Length of moving object
If feature sizes are reduced to improve transistor performance, then operating speed increases, but the ability to form air gaps using traditional techniques deteriorates
Solution Approach 1:
The patent applies parameter changes by altering the physical or chemical state of the insulating material through a damage-causing process. This creates regions with modified properties (different etch selectivity) that enable air gap formation through selective removal, making the process feasible at reduced feature sizes where traditional air gap formation techniques are no longer effective
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces parasitic RC time constants and capacitive coupling between conductive lines, enhancing the electrical performance of integrated circuit products by creating stable air gaps that minimize leakage and improve signal propagation.
Implementation Method 1
performing a selective etching process to selectively remove at least portions of the damaged portions of the layer of insulating material and thereby define an air gap positioned laterally adjacent each of the conductive lines
Data Source
AI summary
One illustrative method disclosed herein includes, among other things, forming a plurality of trenches in a layer of insulating material, performing at least one damage-causing process operation to selectively damage portions of the insulating material adjacent the trenches, forming a conductive line in each of the trenches, after forming the conductive lines, performing a selective etching process to selectively remove at least portions of the damaged portions of the insulating material and thereby define an air gap positioned laterally adjacent each of the conductive lines, and forming a capping layer of material above the conductive lines, the air gap and the undamaged portion of the layer of insulating material.