Air Gap Shielding in Nonvolatile Memory Element Isolation
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Solution Overview
Problem
In nonvolatile semiconductor memory devices with floating gates, such as NAND flash memory, the reduction in peripheral transistor size is hindered by parasitic transistors formed due to fixed charges in insulating films, leading to decreased threshold values and increased off-leakage currents, especially when the transistor width is reduced.
Innovation Solution
The formation of air gaps with low dielectric constant between the element isolation insulating region and the side surfaces of the gate insulating film and gate electrode, which reduces the effect of fixed charges and suppresses the formation of parasitic transistors and field inversion leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the width of the peripheral transistor is reduced to shrink the memory cell unit, then the device density is improved, but parasitic transistors are formed at the end portion of the element region causing decreased threshold value and increased off-leakage current
Solution Approach 1:
An air gap is introduced as an intermediary substance between the element isolation insulating region and the semiconductor substrate at the end portion of the element region. This air gap acts as a mediator to shield the peripheral transistor from the influence of fixed charges in the insulating film, preventing parasitic transistor formation while allowing the transistor width to be reduced for higher density.
2Area of moving object
If the width of the peripheral transistor is reduced, then the device density is improved, but off-leakage current increases due to parasitic transistor formation
Solution Approach 1:
The air gap serves as a protective intermediary that blocks the harmful electric field from fixed charges in the insulating film from reaching the peripheral transistor channel. This shielding effect prevents the formation of parasitic transistors that would otherwise cause off-leakage current, enabling smaller transistor dimensions without increasing leakage.
3Reliability
If fixed charges in the insulating film are present, then the element isolation region provides proper isolation, but parasitic transistors are formed at the end portion of the element region
Solution Approach 1:
The element isolation structure is segmented into two distinct regions: a first element isolation insulating region filled with insulating film that provides proper electrical isolation, and a second element isolation insulating region containing an air gap that specifically addresses parasitic transistor formation. This segmentation allows each region to fulfill its specific function without interfering with the other.
Solution Approach 2:
The air gap in the second element isolation insulating region acts as an intermediary shield between the fixed charges in the first isolation region and the peripheral transistor. This intermediary structure maintains the isolation effectiveness provided by the insulating film while preventing the harmful interaction that causes parasitic transistors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses the formation of parasitic transistors and reduces off-leakage currents, allowing for smaller transistor sizes while maintaining performance by creating a shield effect against fixed charges and field inversion leakage.
Implementation Method 1
The formation of air gaps with low dielectric constant between the element isolation insulating region and the side surfaces of the gate insulating film and gate electrode
Data Source
AI summary
According to one embodiment, a nonvolatile semiconductor memory device includes an element region, a gate insulating film, a first gate electrode, an intergate insulating film, a second gate electrode and an element isolation region. The gate insulating film is formed on the element region. The first gate electrode is formed on the gate insulating film. The intergate insulating film is formed on the first gate electrode and has an opening. The second gate electrode is formed on the intergate insulating film and in contact with the first gate electrode via the opening. The element isolation region encloses a laminated structure formed by the element region, the gate insulating film, and the first gate electrode. The air gap is formed between the element isolation region and side surfaces of the element region, the gate insulating film and the first gate electrode.