Air Gap Formation in Semiconductor Interconnects
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Solution Overview
Problem
As semiconductor device sizes decrease, the reduced distance between interconnect lines leads to increased parasitic capacitance, affecting circuit speed due to larger RC constants.
Innovation Solution
Forming an air gap between adjacent metal elements by creating a hydrophilic surface on a cap layer using plasma treatment and sealing it with an inter-layer dielectric layer, which has a lower surface energy than the cap layer, to increase the air gap volume and reduce parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the device size is reduced to improve integration, then the area occupied by the semiconductor device is reduced, but the distance between interconnect lines is reduced leading to increased parasitic capacitance
Solution Approach 1:
The patent extracts the dielectric material between adjacent metal elements and replaces it with an air gap. By removing the solid dielectric material from the region between interconnect lines and filling with air (which has much lower dielectric constant), the parasitic capacitance between adjacent metal elements is significantly reduced, thus resolving the harmful effect while maintaining the reduced device area
Solution Approach 2:
The patent changes the dielectric parameter (dielectric constant) in the region between interconnect lines from that of solid dielectric material (typically 3-10) to that of air (approximately 1.0). This parameter change directly reduces the parasitic capacitance between adjacent metal elements, allowing the device to maintain high integration while reducing the harmful RC constant effect
2Productivity
If the distance between interconnect lines is reduced to improve integration, then the area is reduced, but the RC constant increases reducing circuit speed
Solution Approach 1:
By extracting the high-dielectric-constant material from between adjacent interconnect lines and replacing it with air, the parasitic capacitance component of the RC constant is reduced. This allows the circuit to maintain higher speed performance even as integration increases and line spacing decreases
Solution Approach 2:
The patent changes the dielectric parameter between interconnect lines from solid dielectric material to air, directly reducing the capacitance term in the RC constant. This parameter change enables faster circuit operation at higher integration levels where line spacing is necessarily reduced
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased air gap volume reduces the average dielectric constant, thereby decreasing parasitic capacitance and RC constants, enhancing circuit speed and performance.
Implementation Method 1
A cap layer is disposed over the substrate, wherein a portion of the cap layer above the adjacent two of the metal elements has a hydrophilic surface
Implementation Method 2
a surface energy of the hydrophilic surface of the cap layer induces heterogeneous nucleation at an interface to the inter-layer dielectric layer
Implementation Method 3
An inter-layer dielectric layer is disposed on the cap layer. The inter-layer dielectric layer seals the air gap between the two metal elements. The air gap remains and extends higher than a top surface of the metal elements
Data Source
AI summary
A structure of semiconductor device includes a substrate, having a dielectric layer on top. At least two metal elements are formed in the dielectric layer, wherein an air gap is between adjacent two of the metal elements. A cap layer is disposed over the substrate, wherein a portion of the cap layer above the adjacent two of the metal elements has a hydrophilic surface. An inter-layer dielectric layer is disposed on the cap layer. The inter-layer dielectric layer seals the air gap between the two metal elements. The air gap remains and extends higher than a top surface of the metal elements.