Air Gap in Semiconductor Trenches Reduces Capacitance
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Solution Overview
Problem
Highly integrated semiconductor devices experience signal delay due to capacitance between conductive patterns, which affects their performance.
Innovation Solution
A semiconductor device structure incorporating a conductive pattern within a trench, side spacers on the conductive pattern, and an air gap between the trench and the spacers, which reduces capacitance and signal delay by optimizing the layout and materials used in the interlayer insulating layers and etch stop layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conductive patterns are highly integrated to increase device functionality, then device complexity and functionality are improved, but capacitance between conductive patterns increases causing signal delay
Solution Approach 1:
The patent extracts the problematic insulating material from between the conductive patterns by creating an air gap. The air gap is formed by removing the insulating layer in a specific region between the first and second conductive patterns, thereby eliminating the dielectric material that causes capacitance and signal delay while maintaining the high integration of conductive patterns.
Solution Approach 2:
The patent introduces an air gap (a porous/void space) between the conductive patterns instead of using solid insulating material. This air gap has effectively zero dielectric constant compared to traditional insulating materials, minimizing capacitance between the conductive patterns while allowing the patterns to remain closely integrated for high functionality.
2Loss of time
If air gap is introduced to reduce capacitance, then signal delay is reduced, but device structure becomes more complex
Solution Approach 1:
The patent applies preliminary action by forming the air gap between the conductive patterns before completing the insulation layer formation. The air gap is created early in the fabrication process by selectively removing insulating material, and then the insulation layer is completed around this pre-formed gap. This approach integrates the air gap creation into the existing fabrication flow without requiring separate complex processing steps.
Data Source
AI summary
A semiconductor device includes a substrate, a conductive pattern, a side spacer, and an air gap. The substrate includes an interlayer insulating layer and a trench penetrating the interlayer insulating layer. The conductive pattern is disposed within the trench of the substrate. The side spacer is disposed within the trench. The side spacer covers an upper side surface of the conductive pattern. The air gap is disposed within the trench. The air gap is bounded by a sidewall of the trench, the side spacer, and a lower side surface of the conductive pattern. A level of a bottom surface of the conductive pattern is lower than a level of bottom surfaces of the side spacer.