Air-Gap Spacer Formation for Semiconductor Parasitic Capacitance Reduction
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Solution Overview
Problem
In modern integrated circuits, the parasitic gate-to-contact capacitor delays switching speed due to the high k-value of silicon nitride spacers, and forming air gaps in these spacers can lead to reduced capacitance reduction or electrical short circuits, complicating the manufacturing process.
Innovation Solution
A method is developed to form an air-gap spacer on a semiconductor device by creating spacer cavities above the active region and replacing the original spacers with air-gap spacers, while maintaining solid spacers above the isolation region to prevent conductive material flow into the air gaps, thus reducing parasitic capacitance without additional masking layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If air gaps are formed in the spacer around the entire perimeter of the gate structure, then the parasitic capacitance is reduced, but conductive material may flow into the air gap causing electrical short circuits
Solution Approach 1:
The spacer structure is differentiated into two regions: air gaps are formed only in the active region above the substrate surface, while the isolation region maintains a solid spacer structure. This local differentiation allows capacitance reduction where needed while preventing short circuits in the isolation region, as the solid spacer material blocks conductive material flow into the air gaps.
2Reliability
If a masking layer is formed to cover the CB contact area when forming air gaps, then electrical short circuits are prevented, but the manufacturing process complexity and cost increase
Solution Approach 1:
The isolation region is prepared in advance with a solid spacer structure before air gap formation. This preliminary solid structure acts as a built-in barrier that prevents conductive material from flowing into air gaps during subsequent processing, eliminating the need for additional masking layers and simplifying the manufacturing process.
Solution Approach 2:
The solid spacer material in the isolation region serves as an intermediary barrier between the air gaps in the active region and the CB contact area. This intermediary structure physically blocks the path for conductive material flow, preventing short circuits without requiring complex masking processes.
3Reliability
If solid spacers are maintained above the isolation region, then conductive material flow into air gaps is prevented, but the parasitic capacitance reduction is limited
Solution Approach 1:
The spacer structure is differentiated into two regions: air gaps are formed only in the active region above the substrate surface, while the isolation region maintains a solid spacer structure. This local differentiation allows capacitance reduction where needed while preventing short circuits in the isolation region, as the solid spacer material blocks conductive material flow into the air gaps.
Data Source
AI summary
One illustrative method disclosed herein includes, among other things, forming a gate structure above an active region and an isolation region, wherein the gate structure comprises a gate, a first gate cap layer and a first sidewall spacer, removing portions of the first gate cap layer and the first sidewall spacer that are positioned above the active region, while leaving portions of the first gate cap layer and the first sidewall spacer positioned above the isolation region in place, wherein a plurality of spacer cavities are defined adjacent the gate, and forming a replacement air-gap spacer in each of the spacer cavities adjacent the gate and a replacement gate cap layer above the gate, wherein the replacement air-gap spacer comprises an air gap.