Air Gap Spacers in Semiconductor Interconnects
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Solution Overview
Problem
In semiconductor device fabrication, copper diffusion from BEOL interconnects into FEOL silicon-based devices can cause shorting and alter transistor characteristics, necessitating effective barrier layers in the MOL to prevent such issues.
Innovation Solution
A method involving the formation of a metallization layer, dielectric layer, and polymer-adhering liner layer, followed by selective deposition of a dielectric polymer to seal air gaps between the dielectric polymer and the substrate, minimizing unwanted dielectric deposition on metal conductor side walls and reducing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dielectric layer is formed over metallization to prevent copper diffusion, then copper diffusion is prevented, but parasitic capacitance increases
Solution Approach 1:
The dielectric layer is segmented into disconnected regions separated by air gaps. Instead of forming a continuous dielectric layer over the metallization, the layer is divided into isolated segments that prevent copper diffusion only where needed (over the metal conductors) while leaving gaps elsewhere. This segmentation reduces the total dielectric material present, thereby reducing parasitic capacitance while maintaining the barrier function against copper diffusion.
2Object-generated harmful factors
If air gaps are introduced to reduce parasitic capacitance, then capacitance offset is reduced, but copper diffusion barriers may be compromised
Solution Approach 1:
The dielectric layer is applied with local quality variations - it is present only in specific locations where copper diffusion prevention is needed (over the metal conductor regions) and absent in other locations (creating air gaps). This localized application ensures that the barrier function is provided exactly where copper diffusion is a risk, while air gaps are introduced in regions where diffusion prevention is not required, thereby reducing overall parasitic capacitance.
3Object-generated harmful factors
If selective deposition is used to seal air gaps, then parasitic capacitance is reduced, but manufacturing complexity increases
Solution Approach 1:
A polymer-adhering liner layer is introduced as an intermediary between the metallization and the dielectric material. This liner layer has specific properties that enable selective adhesion - it allows dielectric material to adhere to it in certain regions while preventing adhesion in other regions. This intermediary layer controls the selective deposition process, enabling the formation of disconnected dielectric regions and air gaps through a relatively simple deposition process, thereby managing manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents copper diffusion while minimizing capacitance offset, enhancing the reliability and performance of semiconductor devices by reducing parasitic capacitance and device delay.
Implementation Method 1
The dielectric polymer seals an air gap positioned between a bottom surface of the dielectric polymer and a top surface of the substrate
Implementation Method 2
forming a polymer-adhering liner layer on sidewalls of the dielectric layer and on the top surface of the metallization layer
Data Source
AI summary
A semiconductor structure includes a substrate. A first metallization layer is disposed on the substrate. A second metallization layer is disposed on the first metallization layer and having one or more openings, wherein at least one of the one or more openings is configured to expose a top surface of the first metallization layer. A polymer-adhering liner layer is disposed on sidewalls of the at least one of the one more openings in the second metallization layer. A dielectric polymer is disposed in the at least one of the one or more openings in the second metallization layer and on the polymer-adhering liner layer. The dielectric polymer is configured to seal an air gap in the dielectric polymer.