Air Gap Between Source and Drain in Thin Film Transistors
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Solution Overview
Problem
Conventional thin-film transistors (TFTs) in back-gated architecture suffer from high capacitance between the source and drain electrodes, which negatively impacts operational speed, energy consumption, and performance.
Innovation Solution
Incorporating an air gap between the source and drain electrodes, which reduces capacitance due to the lower dielectric constant of air compared to traditional dielectric materials, thereby improving operational speed, noise margin, and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional dielectric materials are used between source and drain electrodes, then structural stability is maintained, but capacitance is high which reduces operational speed
Solution Approach 1:
The patent changes the dielectric parameter (dielectric constant) by replacing traditional oxide dielectric materials with air gaps. Air has a dielectric constant of approximately 1.0, significantly lower than conventional dielectric materials, which directly reduces the capacitance between source and drain electrodes and improves operational speed
Solution Approach 2:
The patent extracts the dielectric material from the region between source and drain electrodes and replaces it with air gaps. This removal of traditional dielectric materials eliminates the high capacitance problem while maintaining the necessary electrical isolation through the remaining dielectric layers
2Speed
If air gap is introduced to reduce capacitance, then operational speed improves, but manufacturing complexity increases
Solution Approach 1:
The patent incorporates air gaps during the initial formation stages of the TFT structure, specifically during the deposition of dielectric layers and electrode formation. By pre-planning and integrating air gap regions into the manufacturing process flow, the complexity is managed systematically rather than adding post-processing steps
Solution Approach 2:
The air gaps are nested within the existing multi-layer dielectric structure of the TFT. The gaps are formed as voids within the stacked dielectric layers, utilizing the natural layering of the device architecture to accommodate the air gaps without requiring separate manufacturing processes
3Use of energy by moving object
If air gap is used between source and drain electrodes, then capacitance is reduced, but structural stability may be compromised
Solution Approach 1:
The patent employs a composite structure combining air gaps with remaining dielectric materials. The air gaps provide low capacitance regions, while the surrounding dielectric layers maintain structural integrity and electrical isolation. This composite approach leverages the advantages of both air (low dielectric constant) and solid dielectric materials (structural support)
Solution Approach 2:
The patent applies different dielectric properties to different regions of the device. Air gaps are strategically placed in regions where low capacitance is critical (between source and drain electrodes), while solid dielectric materials are retained in regions requiring structural support and electrical isolation. This localized differentiation optimizes both electrical performance and structural stability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The air gap between the source and drain electrodes in TFTs leads to reduced capacitance, enhancing operational speed, energy efficiency, and stability, while minimizing unwanted interactions with oxide films over the channel.
Implementation Method 1
Incorporating an air gap between the source and drain electrodes, which reduces capacitance due to the lower dielectric constant of air compared to traditional dielectric materials
Data Source
AI summary
Embodiments herein describe techniques for a thin-film transistor (TFT), which may include a gate electrode above a substrate and a channel layer above the gate electrode. A source electrode may be above the channel layer and adjacent to a source area of the channel layer, and a drain electrode may be above the channel layer and adjacent to a drain area of the channel layer. A passivation layer may be above the channel layer and between the source electrode and the drain electrode, and a top dielectric layer may be above the gate electrode, the channel layer, the source electrode, the drain electrode, and the passivation layer. In addition, an air gap may be above the passivation layer and below the top dielectric layer, and between the source electrode and the drain electrode. Other embodiments may be described and/or claimed.