Air Gap Around Through-Silicon Via for Thermal Stress
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Solution Overview
Problem
The integration of copper through-silicon vias (TSVs) with silicon substrates leads to significant thermal stress due to the mismatch in coefficients of thermal expansion (CTE), causing issues like thin-film delamination and performance degradation over time.
Innovation Solution
An air gap is formed around the through-silicon via between the copper TSV and the silicon substrate by creating a series of cavities, filling them with sacrificial and conductive materials, and removing the sacrificial material to create a gap, which is then capped.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If copper through-silicon vias are integrated with silicon substrates, then electrical connectivity is achieved, but thermal stress increases due to CTE mismatch
Solution Approach 1:
An air gap is introduced as an intermediary layer between the copper TSV and silicon substrate. This air gap acts as a stress-isolating mediator that prevents direct stress transfer between the dissimilar materials, thereby reducing thermal-mechanical stress while maintaining electrical connectivity through the conductive TSV structure.
Solution Approach 2:
The direct contact interface between copper TSV and silicon substrate is segmented by introducing an air gap. This segmentation separates the two materials into distinct zones, preventing the propagation of stress fields and allowing each material to expand or contract independently without causing delamination or cracking.
2Productivity
If TSVs are packed closely together to increase device density, then productivity improves, but stress field interaction increases causing performance degradation
Solution Approach 1:
Air gaps are introduced between adjacent TSVs to segment their stress fields. This segmentation prevents the overlap and interaction of stress fields from closely packed TSVs, allowing higher device density to be achieved without the performance degradation that would result from stress field interaction.
3Stress or pressure
If an air gap is formed around TSVs to reduce stress, then thermal-mechanical stress decreases, but manufacturing complexity increases
Solution Approach 1:
The air gap formation is accomplished through preliminary actions during the TSV fabrication sequence. Sacrificial material is deposited and patterned before TSV formation, and selective removal creates the air gap in advance. This preliminary structuring integrates the air gap creation into the existing manufacturing flow without requiring separate complex processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces thermal-mechanical stress, allows for closer packing of TSVs without performance degradation, and increases semiconductor device density.
Implementation Method 1
This method reduces thermal-mechanical stress
Data Source
AI summary
Semiconductor devices with air gaps around the through-silicon via are formed. Embodiments include forming a first cavity in a substrate, filling the first cavity with a sacrificial material, forming a second cavity in the substrate, through the sacrificial material, by removing a portion of the sacrificial material and a portion of the substrate below the sacrificial material, filling the second cavity with a conductive material, removing a remaining portion of the sacrificial material to form an air gap between the conductive material and the substrate, and forming a cap over the air gap.


