Air-Gap Word Lines for 3D Memory Parasitic Capacitance
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Solution Overview
Problem
3D stacked memory architectures face challenges with parasitic capacitance, leading to increased delay and yield loss due to significant parasitic discharge, which limits scalability and performance, especially as word line spacing is scaled.
Innovation Solution
Incorporating air-gaps between stacked word lines to reduce parasitic capacitance, utilizing air's low dielectric constant, which improves bandwidth and reliability while maintaining backend compatibility and reducing cost through relaxed selector/RRAM processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If word line spacing is scaled to increase density, then memory density is improved, but parasitic capacitance increases leading to increased delay and yield loss
Solution Approach 1:
The patent introduces an air-gap as an intermediary dielectric material between adjacent word lines. This air-gap acts as a mediator that reduces the parasitic capacitance coupling between word lines compared to conventional solid dielectric materials, thereby reducing parasitic discharge and yield loss while maintaining scaled spacing for high density
Solution Approach 2:
The patent changes the dielectric parameter (dielectric constant) of the material between word lines from conventional solid dielectric materials to air (which has a dielectric constant of approximately 1.0). This parameter change significantly reduces parasitic capacitance and associated discharge effects, improving reliability at scaled dimensions
2Quantity of substance
If word line spacing is scaled to increase density, then memory density is improved, but RC delay increases due to increased parasitic capacitance
Solution Approach 1:
The air-gap serves as an intermediary that reduces parasitic capacitance between word lines, directly lowering the RC time constant and associated delays while enabling tighter spacing for higher density
Solution Approach 2:
By changing the dielectric constant parameter to its minimum practical value (air), the patent minimizes parasitic capacitance and RC delay, enabling faster operation at scaled dimensions
3Ease of manufacture
If conventional dielectric materials are used between word lines, then manufacturing is simplified, but parasitic discharge causes significant yield loss
Solution Approach 1:
The air-gap is introduced as a simple intermediary structure that can be formed through conventional sacrificial layer release techniques, maintaining manufacturing simplicity while dramatically reducing parasitic discharge and improving yield
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of air-gaps between word lines effectively lowers the resistance-capacitance (RC) constant, reducing parasitic discharge and improving memory performance, thereby enhancing scalability and reliability while maintaining cost-effectiveness.
Implementation Method 1
Incorporating air-gaps between stacked word lines to reduce parasitic capacitance, utilizing air's low dielectric constant
Data Source
AI summary
Integrated circuits including 3D memory structures are disclosed. Air-gaps are purposefully introduced between word lines. The word lines may be horizontal or vertical.