Air Gaps Between Conductive Patterns in Semiconductor Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor devices become more highly integrated, the increasing parasitic capacitance between conductive structures degrades their performance, and existing methods to reduce this capacitance by lowering the dielectric constant of dielectric substances are limited in effectiveness.

Innovation Solution

The method involves forming air gaps between conductive structures by creating sacrificial spacers, recessing conductive patterns, and capping these gaps with a liner layer that undergoes silicidation to form conductive patterns, thereby reducing parasitic capacitance and improving electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the dielectric constant of the dielectric substance is reduced to reduce parasitic capacitance, then parasitic capacitance decreases, but the effectiveness is limited due to the high dielectric constant

Engineering Contradiction:
Improveparasitic capacitanceVSAvoideffectiveness of reduction method
Core Design Contradiction:
Object-affected harmful factorsVSAdaptability or versatility

Solution Approach 1:

The patent extracts the dielectric substance from the space between conductive structures and replaces it with air gaps. By removing the solid dielectric material and creating void spaces filled with air (or vacuum), the effective dielectric constant is dramatically reduced from typical values of 3-10 down to approximately 1.0 for air, thereby significantly reducing parasitic capacitance between adjacent conductive structures

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a porous or hollow structure between conductive elements by forming air gaps through sacrificial spacer removal. This creates an effective medium with reduced dielectric constant, as the air-filled pores or voids replace the solid dielectric material, achieving lower parasitic capacitance while maintaining structural integrity

Inventive Principle:
Principle #31Porous materials

2Object-affected harmful factors

If air gaps are formed between conductive structures to reduce parasitic capacitance, then parasitic capacitance decreases, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveparasitic capacitanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming sacrificial spacers that define the future air gap positions before the actual air gaps are created. These sacrificial spacers are deposited and patterned in advance, serving as temporary structures that guide subsequent processing steps. The spacers are later removed to create the air gaps, ensuring precise positioning without requiring complex direct air gap formation processes

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses sacrificial spacers as intermediary structures that mediate between the conductive structures and the final air gaps. These temporary spacers facilitate the creation of air gaps by occupying the space that will eventually become the air gap, providing a simple and controllable method to define gap dimensions and positions. The spacers are removed after serving their purpose, leaving clean air gaps between conductive elements

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If conductive structures are highly integrated to increase device functionality, then device capability improves, but parasitic capacitance increases and degrades performance

Engineering Contradiction:
Improvedevice functionalityVSAvoidparasitic capacitance
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the dielectric material from between closely-spaced conductive structures in highly integrated devices. By removing this material and replacing it with air gaps, the parasitic capacitance between adjacent conductive elements is significantly reduced. This allows high-density integration to proceed without the performance degradation that would otherwise result from increased parasitic effects

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality by creating air gaps specifically in the regions between conductive structures where parasitic capacitance is problematic, while maintaining solid dielectric material in other regions where it provides beneficial functions such as mechanical support or electrical isolation. This localized approach reduces parasitic capacitance at critical interfaces without compromising overall device structure or functionality

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces parasitic capacitance, enhances the electrical performance of semiconductor devices by stabilizing air gaps and forming low-resistance silicide layers, which improves contact resistance and reduces sheet resistance.

Implementation Method 1

forming second conductive patterns through silicidation of the liner layer

Methodology Applied
Scientific EffectSilicidation: Chemical Bonding

Data Source

PatentUS9245849B2Semiconductor device with air gap
Publication Date: 2016.01.26 SK HYNIX INC
  • US9245849B2 patent drawing
  • US9245849B2 patent drawing
  • US9245849B2 patent drawing

AI summary

A method of fabricating a semiconductor device may include forming isolation structures that include openings, over a substrate; forming sacrificial spacers on sidewalls of the openings; forming, on the sacrificial spacers, first conductive patterns that are recessed in the openings; removing the sacrificial spacers, and defining air gaps; forming a liner layer that caps the first conductive patterns and the air gaps; forming second conductive patterns through silicidation of the liner layer; and forming third conductive patterns over the second conductive patterns.