Air Gaps in 3D Memory Insulating Sections
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Solution Overview
Problem
In semiconductor memory devices, issues such as leak current, decreased breakdown voltage, and parasitic capacitance occur in insulating and separating sections, particularly in three-dimensional structures, which affect reliability and operation speed.
Innovation Solution
The formation of air gaps within insulating and separating sections, surrounded by insulating films, reduces parasitic capacitance, leak current, and improves breakdown voltage by creating a region with a lower dielectric constant, thereby enhancing the reliability and speed of the semiconductor memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If insulating films are used to separate memory cells and gates in three-dimensional structures, then electrical separation is achieved, but parasitic capacitance increases and breakdown voltage decreases
Solution Approach 1:
The patent introduces air gaps (porous structures with air as the filling material) into the insulating and separating sections between memory cells and gates. Air has a dielectric constant of approximately 1, which is significantly lower than conventional insulating materials, thereby reducing parasitic capacitance while maintaining electrical isolation and improving breakdown voltage characteristics.
Solution Approach 2:
The patent creates a composite structure combining insulating films and air gaps in the separating sections. This composite approach allows the insulating films to provide mechanical support and complete electrical isolation, while the air gaps minimize parasitic capacitance, achieving a balance between structural integrity and electrical performance.
2Reliability
If conventional insulating materials are used in separating sections, then electrical isolation is provided, but leak current occurs
Solution Approach 1:
The patent replaces solid insulating materials with air gaps in the separating sections. Air is an excellent electrical insulator with extremely low conductivity, which effectively suppresses leak current between adjacent memory cells and gates while maintaining the necessary electrical isolation in three-dimensional structures.
3Quantity of substance
If three-dimensional stacked structures are implemented, then storage density increases, but insulating and separating section problems worsen
Solution Approach 1:
The patent introduces air gaps into the insulating and separating sections of three-dimensional stacked structures. This allows the benefits of high-density 3D stacking to be realized while the air gaps mitigate the adverse effects by reducing parasitic capacitance and leak current, thereby maintaining reliable electrical isolation in the compact three-dimensional architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of air gaps in insulating and separating sections effectively reduces parasitic capacitance, leak current, and increases breakdown voltage, improving the reliability and speed of semiconductor memory devices, particularly in three-dimensional structures.
Implementation Method 1
The formation of air gaps within insulating and separating sections, surrounded by insulating films, reduces parasitic capacitance, leak current, and improves breakdown voltage by creating a region with a lower dielectric constant
Implementation Method 2
The formation of air gaps within insulating and separating sections, surrounded by insulating films, reduces parasitic capacitance, leak current, and improves breakdown voltage by creating a region with a lower dielectric constant
Implementation Method 3
The formation of air gaps within insulating and separating sections, surrounded by insulating films, reduces parasitic capacitance, leak current, and improves breakdown voltage by creating a region with a lower dielectric constant
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode layers separately stacked each other; a plurality of columnar sections provided in the stacked body and extending in a stacking direction of the stacked body; and a first insulating section separating the stacked body. The respective columnar sections include a semiconductor body extending in the stacking direction; and a charge storage film provided between the semiconductor body and the plurality of electrode layers. The first insulating section includes a first air gap.


