Air-T Gate Electrode for Millimeter-Wave HEMTs
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Solution Overview
Problem
Conventional gate electrode formation methods in high electron mobility transistors (HEMTs) lead to gaps between the dielectric and the gate electrode, causing current collapse and inferior passivation, which are detrimental to device performance, especially in high power and high frequency applications.
Innovation Solution
A semiconductor structure with a protective layer and a gate electrode comprising a contact portion, a first-tier portion with concave sidewalls, and a second-tier portion, formed using a multi-layer resist process with varying exposure dosage to ensure complete filling of the etched portion and reduced void formation, resulting in an 'Air-T' gate structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional gate electrode formation methods are used, then the fabrication process is simple, but gaps are formed between the dielectric and gate electrode causing current collapse and inferior passivation
Solution Approach 1:
The gate electrode is divided into multiple tiers (first-tier and second-tier portions) with different lateral extensions, allowing the structure to fill the etched portion completely while maintaining simple fabrication processes. The segmented structure eliminates gaps between the dielectric and gate electrode that cause current collapse.
Solution Approach 2:
The gate electrode structure transitions from a conventional single-level design to a multi-tiered three-dimensional structure. The first-tier portion extends laterally on the dielectric surface while the second-tier portion sits atop and extends beyond, creating a stepped configuration that completely fills the etched region and eliminates harmful gaps.
2Productivity
If conventional gate electrode structures are used, then fabrication is straightforward, but gate-to-drain and gate-to-source capacitance are high reducing gain
Solution Approach 1:
The gate electrode is segmented into tiers with progressively reduced lateral extensions. The first-tier portion has a specific lateral extension while the second-tier portion extends beyond it, creating a stepped structure that reduces overlapping capacitance between gate and drain/source regions, thereby increasing device gain.
3Reliability
If the gate electrode completely fills the etched portion, then passivation is improved, but void formation may occur during deposition
Solution Approach 1:
The gate electrode is formed as a multi-tiered structure where the first-tier portion fills the lower region of the etched portion and the second-tier portion fills the upper region. This segmentation allows complete filling of the etched region while the stepped configuration facilitates uniform material deposition, reducing void formation during the fabrication process.
Data Source
AI summary
A transistor device having a tiered gate electrode fabricated with methods using a triple layer resist structure. The triple layer resist stack is deposited on a semiconductor structure. An exposure pattern is written onto the resist stack using an e-beam writer, for example. The exposure dose is non-uniform across the device. Portions of the three resist layers are removed with a sequential development process, resulting in tiered resist structure. A conductive material is deposited to form the gate electrode. The resulting “Air-T” gate also has a three-tiered structure. The fabrication process is well-suited for the production of gates small enough for use in millimeter wave devices.