Air-Gap Gate Spacer Structure to Prevent Subway Defects
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Solution Overview
Problem
The formation of air-gap spacers around FET gates is challenging, especially in FETs with self-aligned contact fabrication stages, as it can lead to subway defects due to contact etch opening the air-gap, resulting in voids filled with conductive material causing electrical shorts and yield degradation, and designing contacts far away from the air-gap spacer reduces semiconductor device scaling.
Innovation Solution
A semiconductor device fabrication method involving the formation of a multilayer spacer on a sacrificial gate structure, recessing the outer spacer below the inner spacer, forming a spacer ear, removing the sacrificial gate, and forming a replacement gate while removing the multilayer spacer to create an air-gap spacer on the sidewall of the replacement gate structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If air-gap spacer is formed around FET gate, then gate-to-drain capacitance is reduced and device scaling is improved, but contact etch opens the air-gap causing subway defects and electrical shorts
Solution Approach 1:
The method forms a multilayer spacer structure with inner and outer spacers before contact fabrication. The outer spacer is recessed below the inner spacer to create an overhang that protects the air-gap from contact etch opening, preventing subway defects while maintaining the air-gap's beneficial electrical isolation properties
Solution Approach 2:
The spacer is divided into multiple layers (inner spacer and outer spacer) with different functions. The inner spacer provides the primary air-gap formation for capacitance reduction, while the outer spacer with recessed top surface provides structural protection against contact etch, allowing each segment to address specific requirements
2Reliability
If contact is designed far away from air-gap spacer, then subway defects are prevented, but semiconductor device scaling factor is reduced
Solution Approach 1:
The protective outer spacer structure is prepared in advance before contact fabrication begins. This preliminary structural preparation allows contacts to be positioned close to the air-gap spacer without risk of subway defects, enabling aggressive device scaling while maintaining high yield
Solution Approach 2:
The outer spacer acts as an intermediary protective structure between the contact etch process and the air-gap spacer. It absorbs the etch damage that would otherwise open the air-gap, allowing close contact placement without compromising reliability
Data Source
AI summary
A semiconductor device includes a gate structure that is formed upon and around a channel fin. The device further includes a source or drain (S/D) region connected to the fin. A spacer liner is located upon a sidewall of the S/D region facing the gate structure. An air-gap spacer is located between the gate structure and the spacer liner. A spacer ear is located above the air-gap spacer between the gate structure and the spacer liner. The spacer ear may be formed by initially forming an inner spacer upon a sidewall of the gate structure and forming an outer spacer upon the inner spacer. The outer spacer may be recessed below the inner spacer and the spacer ear may be formed upon the recessed outer spacer. Subsequently, the inner spacer and outer spacer may be removed to form the air-gap spacer while retaining the spacer ear.