Airgap Interconnect Hood Layer Oxidation Control
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Solution Overview
Problem
As microprocessors become faster and smaller, integrated circuitry becomes more complex, leading to increased capacitive coupling, electromigration, and diffusion issues between interconnects, which affect signal transmission and reliability due to high current density and dielectric material properties.
Innovation Solution
The implementation of airgap interconnects with a hood layer that prevents diffusion and electromigration by using a hood layer to cover exposed surfaces of interconnects and a conformal liner layer to further seal interfaces, reducing capacitive coupling by replacing dielectric material with air and preventing oxidation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If airgap interconnects are implemented to reduce capacitive coupling, then signal transmission quality improves, but interconnect reliability deteriorates due to increased susceptibility to oxidation and material diffusion
Solution Approach 1:
The patent applies different material properties to different locations: the hood layer is selectively deposited only on the top surface of the interconnect, while the sidewalls remain exposed to the airgap. This local differentiation protects the top surface from oxidation and diffusion while maintaining the low-dielectric-constant airgap environment for improved signal transmission.
Solution Approach 2:
The patent creates a composite structure combining the conductive interconnect material with a protective hood layer material. This composite configuration provides both the electrical conductivity needed for signal transmission and the protective properties needed to prevent oxidation and material diffusion at the exposed surfaces.
2Reliability
If barrier layers are added to prevent diffusion and electromigration, then interconnect reliability improves, but interconnect resistance and dimensions increase
Solution Approach 1:
The hood layer is deposited selectively only on the top surface of the interconnect rather than as a complete encapsulation layer. This localized protection prevents diffusion and electromigration at the most vulnerable interface (the top surface exposed to the airgap) while minimizing the addition of resistive material and maintaining the original interconnect dimensions.
Solution Approach 2:
The patent applies partial protection rather than complete encapsulation. The hood layer covers only the top surface where diffusion and electromigration are most problematic, rather than applying barrier material to all surfaces. This partial action achieves the necessary protection while minimizing the negative effects of added barrier material on resistance and dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the reliability of interconnects by reducing capacitive coupling, preventing material diffusion and electromigration, and maintaining low resistance, thereby improving signal transmission and device performance.
Implementation Method 1
The surrounding material electrically insulates each interconnect from neighboring interconnects. However, the dielectric properties of the substrate material enable capacitive coupling between adjacent interconnects
Implementation Method 2
interconnect material may diffuse into the surrounding dielectric material, reducing the dielectric insulating capacity
Implementation Method 3
increased current density and resistance along with a greater risk of electromigration
Implementation Method 4
a hood layer to cover exposed surfaces of interconnects... preventing oxidation
Data Source
AI summary
An airgap interconnect structure with hood layer and methods for forming such an airgap interconnect structure are disclosed. A substrate having a dielectric layer with a plurality of interconnects formed therein is provided. Each interconnect is encapsulated by a barrier layer. A hardmask is formed on the dielectric layer and patterned to expose the dielectric layer between adjacent interconnects where an airgap is desired. The dielectric layer is etched to form a trench, wherein the etching process additionally etches at least a portion of the barrier layer to expose a portion of the side surface of each adjacent copper interconnect. A hood layer is electrolessly plated onto an exposed portion of the top surface and the exposed portion of the side surface to reseal the interconnect. A gap-sealing dielectric layer is formed over the device, sealing the trench to form an airgap.