Air Gap Interconnection Structure for Low-k Dielectric Integration

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Solution Overview

Problem

As integrated circuits shrink, the electrical properties of dielectric materials between conductive structures are insufficient, leading to increased capacitive coupling and propagation delay, limiting the speed of future circuits.

Innovation Solution

An interconnection structure is formed with an air gap between adjacent conductive structures by creating a trench, sealing it with a first dielectric layer, and then covering it with a second dielectric layer, where the curing process increases the air gap volume, reducing the overall dielectric constant and minimizing capacitive coupling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional dielectric materials are used between conductive structures, then the structure is simple to manufacture, but capacitive coupling increases and circuit speed decreases

Engineering Contradiction:
Improvecircuit operation speedVSAvoidinterconnection structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies porous low-k dielectric materials with controlled porosity (20-80%) to reduce the effective dielectric constant between conductive structures. The porous structure is achieved through specific deposition processes that create voids within the dielectric matrix, thereby reducing capacitive coupling and improving signal propagation speed without requiring complex air gap formation structures

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The patent uses composite dielectric structures combining organic and inorganic materials (such as SiCOH, SiOC, or BCB polymers with ceramic fillers) to achieve optimal dielectric properties. These composite materials provide both low dielectric constant and mechanical strength, resolving the contradiction between speed improvement and structural integrity

Inventive Principle:
Principle #40Composite materials

2Reliability

If low-k dielectric materials are used to reduce capacitive coupling, then circuit performance improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improveisolation between conductive structuresVSAvoiddielectric layer deposition precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent employs parameter optimization in the deposition process, controlling factors such as deposition temperature, pressure, and material composition to achieve consistent low-k dielectric properties. By optimizing these parameters, the patent achieves reliable isolation between conductive structures while maintaining manufacturability within standard precision capabilities

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent performs preliminary surface preparation and adhesion promotion steps before depositing the low-k dielectric material. This includes plasma treatment, adhesion layers, and surface conditioning that ensure proper bonding and uniform thickness, thereby reducing manufacturing precision requirements for the subsequent dielectric deposition

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The enlarged air gap significantly reduces the dielectric constant between conductive structures, effectively eliminating capacitive coupling and enhancing the performance of integrated circuits by allowing faster operation.

Implementation Method 1

A first dielectric layer is formed on the patterned layer and seals an air gap in the trench

Methodology Applied
Scientific EffectSurface tension: Surface Tension

Implementation Method 2

Afterward, a curing process is performed to the first dielectric layer and the second dielectric layer. The air gap provided by the present invention may have its volume further enlarged by shrinkage of thickness of the first dielectric layer

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11373901B2Interconnection structure and method of forming the same
Publication Date: 2022.06.28 UNITED MICROELECTRONICS CORP
  • US11373901B2 patent drawing
  • US11373901B2 patent drawing
  • US11373901B2 patent drawing

AI summary

A method of forming an interconnection structure is disclosed, including providing a substrate, forming a patterned layer on the substrate, the patterned layer comprising at least a trench formed therein, depositing a first dielectric layer on the patterned layer and sealing an air gap in the trench, depositing a second dielectric layer on the first dielectric layer and completely covering the patterned layer, and performing a curing process to the first dielectric layer and the second dielectric layer.