Airgap Spacer Transistor Gate Sidewall Design

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Solution Overview

Problem

The miniaturization of microelectronic transistors has led to challenges in performance and efficiency due to increased capacitive coupling between gate electrodes and source/drain contacts, which existing solid or semi-solid dielectric spacers fail to adequately address.

Innovation Solution

The use of airgap spacers, filled with inert gases, is introduced as gate sidewall spacers to minimize capacitive coupling, reducing circuit delay by leveraging the lower dielectric constant of gases compared to solid materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If solid or semi-solid dielectric spacers are used as gate sidewall spacers, then structural stability is maintained, but capacitive coupling between gate electrode and source/drain contacts increases

Engineering Contradiction:
Improvecapacitive couplingVSAvoidstructural stability
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent changes the dielectric constant parameter by replacing solid/semi-solid dielectric materials with gas-filled airgap spacers. This parameter change reduces the capacitive coupling between the gate electrode and source/drain contacts while maintaining the spacer's structural function through the gas containment structure.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an intermediary gas-filled structure between the gate electrode and source/drain contacts. The airgap spacer acts as a mediator that provides electrical isolation with lower capacitance compared to traditional solid dielectric materials, thereby reducing harmful capacitive coupling effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If transistor size is reduced for miniaturization, then packaging density increases, but capacitive coupling effects are amplified

Engineering Contradiction:
Improvetransistor areaVSAvoidcapacitive coupling
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

By changing the dielectric parameter to a gas-filled structure, the patent reduces the capacitive coupling that becomes more significant as transistor dimensions are reduced. The lower dielectric constant of the gas-filled airgap spacer mitigates the amplified capacitive effects in miniaturized transistors.

Inventive Principle:
Principle #35Parameter changes

3Speed

If circuit delay is reduced for improved performance, then speed increases, but capacitive coupling must be minimized

Engineering Contradiction:
Improvecircuit speedVSAvoidcapacitive coupling
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The gas-filled airgap spacer serves as an intermediary structure that reduces capacitive coupling between the gate electrode and source/drain contacts. This reduction in parasitic capacitance directly decreases circuit delay, thereby improving the overall speed and performance of the microelectronic device.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of airgap spacers significantly reduces capacitive coupling between the gate electrode and source/drain contacts, thereby enhancing the performance and efficiency of microelectronic transistors by minimizing circuit delay.

Implementation Method 1

minimize capacitive coupling, reducing circuit delay by leveraging the lower dielectric constant of gases compared to solid materials

Methodology Applied
Scientific EffectDielectric constant: Dielectric Permittivity

Data Source

PatentEP3926688A1Transistor with airgap spacer
Publication Date: 2021.12.22 INTEL CORP
  • EP3926688A1 patent drawingFigure 1~2
  • EP3926688A1 patent drawingFigure 3~4
  • EP3926688A1 patent drawingFigure 5~6

AI summary

A microelectronic transistor may be fabricated having an airgap spacer formed as a gate sidewall spacer, such that the airgap spacer is positioned between a gate electrode and a source contact and/or a drain contact of the microelectronic transistor. As the dielectric constant of gaseous substances is significantly lower than that of a solid or a semi-solid dielectric material, the airgap spacer may result in minimal capacitive coupling between the gate electrode and the source contact and/or the drain contact, which may reduce circuit delay of the microelectronic transistor.