Alarm Register Segmentation for Multi-CPU Failure Information
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Solution Overview
Problem
In distributed processing systems, when a CPU reads failure information from an alarm register, the information for other CPUs is often cleared, leading to difficulties in recognizing and maintaining failures across multiple CPUs, and existing solutions either increase analysis costs or require non-standard AOC development.
Innovation Solution
An information processing apparatus that includes a managing unit to read and store failure information in units of a second size, allowing for the notification of failure information to corresponding CPUs, while maintaining existing information in a buffer for each CPU, ensuring that failure information is not lost and can be accurately analyzed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If a CPU reads failure information from the alarm register, then the failure information for that CPU is acquired, but the failure information for other CPUs is cleared and lost
Solution Approach 1:
The alarm register is divided into multiple independent storage areas, with each area corresponding to a specific CPU. When a CPU reads failure information, only its dedicated storage area is accessed and cleared, while other storage areas remain intact. This segmentation prevents the loss of failure information for other CPUs while maintaining the standard one-byte readout unit.
2Loss of information
If a conventional technology stores new event information together with existing event information, then information collection is improved, but failure information is still cleared after a CPU reads it, making it difficult for other CPUs to acquire their failure information
Solution Approach 1:
The storage structure is segmented into CPU-specific storage areas within the alarm register. Each CPU has its dedicated area where failure information is stored independently. This approach maintains simplicity by using the standard one-byte readout unit while preventing information loss through logical separation, avoiding the need for complex buffer management systems.
3Loss of information
If a CPU that has read failure information holds all read failure information for other CPUs to use, then failure information availability is improved, but the amount of information to be analyzed increases and costs increase
Solution Approach 1:
Failure information is segmented and stored in CPU-specific storage areas within the alarm register. Each CPU directly accesses its own dedicated area, retrieving only the failure information relevant to it. This eliminates the need for one CPU to hold and manage failure information for all other CPUs, reducing the information volume each CPU must process while ensuring availability.
4Loss of information
If the alarm register uses a bitmap with one byte assigned to each CPU, then failure information for multiple CPUs can be stored, but the register clearing mechanism still clears all information when any CPU reads
Solution Approach 1:
The alarm register is segmented into multiple independent storage areas at the byte level, with each byte dedicated to a specific CPU. The clearing mechanism is also segmented to clear only the specific byte corresponding to the reading CPU, rather than clearing the entire register. This maintains the simple bitmap structure while enabling selective clearing to prevent information loss.
Data Source
AI summary
An alarm register stores therein failure information having a first size and related to a failure that has occurred in communication performed by each of the CPUs 103 and 104. A failure information transmitting unit reads, from the alarm register, failure information in units of a second size including a plurality of pieces of the failure information with the first size, and deletes the read failure information from the alarm register. An information acquiring unit 121 stores, in a failure information buffer 122, the failure information that has been read in units of the second size. An information notifying unit 123 reads failure information in units of the first size from the failure information buffer 122, and gives a notice of the read failure information to the CPU 103 or 104 corresponding to communication in which a failure indicated by the read failure information has occurred.