ALB BIST Digital Interface for Wafer Testing
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Solution Overview
Problem
Current electrical testing methods for complex electronic devices require multiple types of Automatic Test Equipment (ATE) with different temperature conditions, leading to increased complexity and cost, and often result in device damage due to the use of probes, which complicates assembly and reduces parallel testing capabilities.
Innovation Solution
The implementation of an Advanced Low Pin Count Built-In Self Test (ALB) system, which integrates BIST circuits and a digital interface for connecting devices to a digital ATE via a limited number of communication lines, allowing for supervised self-testing and reducing the need for multiple ATE types by using a digital communication channel for command and data exchange.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If probes are used to connect ATE with the wafer, then electrical connection for testing is achieved, but device pads are damaged
Solution Approach 1:
The patent introduces a special test mode circuit as an intermediary between the ATE and the device pads. This circuit includes test mode signal input terminals that receive test signals from ATE and internally switch to connect test signal lines directly to functional signal output terminals, bypassing the need for probe contact with pads. The intermediary circuit thus eliminates direct probe-pad contact while maintaining electrical testing capability.
Solution Approach 2:
The patent replaces the mechanical probe contact system with an electrical signal processing system. Instead of using physical probes to make contact with pads, the invention uses test mode circuits that process electrical signals internally within the device. This substitution eliminates the mechanical contact that causes pad damage while preserving the electrical testing function.
2Adaptability or versatility
If multiple types of ATE are used for complex device testing, then comprehensive testing capability is achieved, but system complexity and cost increase
Solution Approach 1:
The patent implements a universal test mode circuit that can handle multiple types of testing (analog, digital, RF, memory) through a single integrated architecture. The circuit includes functional signal input/output terminals and test mode signal input terminals that can process various signal types. By using one type of ATE with this multi-functional circuit, the need for multiple specialized ATE systems is eliminated, reducing overall system complexity while maintaining comprehensive testing capability.
3Reliability
If probes are used for testing, then electrical testing is performed, but parallel testing capability is reduced
Solution Approach 1:
The patent introduces a special test mode circuit as an intermediary between the ATE and the device pads. This circuit includes test mode signal input terminals that receive test signals from ATE and internally switch to connect test signal lines directly to functional signal output terminals, bypassing the need for probe contact with pads. The intermediary circuit thus eliminates direct probe-pad contact while maintaining electrical testing capability.
Solution Approach 2:
The patent replaces the mechanical probe contact system with an electrical signal processing system. Instead of using physical probes to make contact with pads, the invention uses test mode circuits that process electrical signals internally within the device. This substitution eliminates the mechanical contact that causes pad damage while preserving the electrical testing function.
Data Source
AI summary
A method of electrical testing electronic devices DUT, comprising: connecting at least an electronic device DUT to an automatic testing apparatus suitable for performing the testing of digital circuits or memories or of digital circuits and memories; sending electrical testing command signals to the electronic device DUT by means of the ATE apparatus; performing electrical testing of the electronic device DUT by means of at least one advanced supervised self testing system “Advanced Low Pin Count BIST” ALB which is built in the electronic device DUT, the ALB system being digitally interfaced with the ATE through a dedicated digital communication channel; and sending reply messages, if any, which comprise measures, failure information and reply data to the command signals from the electronic device DUT toward the ATE apparatus by means of the digital communication channel.


