ALD Metal Oxide Memory Structures for Low Voltage Yield
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Solution Overview
Problem
Current nonvolatile resistive-switching memories face limitations in operational and durability characteristics, making them inadequate for meeting the increasing speed and storage demands of electronic devices.
Innovation Solution
The development of resistive-switching memory elements using metal-insulator-metal (MIM) structures with optimized atomic layer deposition (ALD) process parameters, such as reduced pedestal temperature and purge duration, to form metal oxide layers that reduce forming voltage and increase site yield, enabling improved switching mechanisms and durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ALD process parameters are used to form metal oxide layers, then the memory elements can be formed, but the forming voltage is high and site yield is low
Solution Approach 1:
The patent applies parameter changes by modifying ALD process conditions including reducing pedestal temperature to 200°C or below, adjusting purge duration to 5-30 seconds, and optimizing precursor exposure times. These parameter changes result in metal oxide layers with reduced forming voltage (below 5.5V) and improved site yield, directly resolving the technical contradiction between forming voltage and site yield
2Reliability
If flash memory is used to meet storage demands, then nonvolatile storage is provided, but access and writing times are long due to block-access architecture
Solution Approach 1:
The patent replaces the mechanical block-access architecture of flash memory with a resistive-switching memory mechanism that enables byte-level or bit-level addressing. The metal-insulator-metal structure with titanium nitride and hafnium oxide enables direct addressability of individual memory cells through resistive state changes, eliminating the block erasure requirement and significantly improving access speed while maintaining nonvolatile storage capability
3Reliability
If resistive-switching memory elements are formed with conventional processes, then memory functionality is achieved, but operational and durability characteristics are limited
Solution Approach 1:
The patent improves durability and operational characteristics by changing deposition parameters including using lower pedestal temperatures (200°C or below), optimized purge durations (5-30 seconds), and controlled precursor exposure. These changes produce metal oxide layers with better structural properties, resulting in memory elements that maintain their resistive states more reliably over extended periods and exhibit improved cycling durability while maintaining ease of operation
Solution Approach 2:
The patent employs composite material structures combining titanium nitride electrodes with hafnium oxide metal oxide layers. This composite architecture leverages the high work function and conductivity of titanium nitride with the high-k and resistive-switching properties of hafnium oxide, creating a synergistic structure that enhances both durability and operational characteristics beyond what single materials could achieve
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in memory elements with lower forming voltages, higher site yield, and enhanced operational characteristics, such as discrete resistance states and increased durability, making them suitable for high-performance nonvolatile memory applications.
Implementation Method 1
Certain ALD process parameters can be optimized to reduce the forming voltage and increase the site yield of memory elements described herein. For example, the purge duration and the substrate temperature of the deposition process can be optimized.
Data Source
AI summary
ALD processing techniques for forming non-volatile resistive-switching memories are described. In one embodiment, a method includes forming a first electrode on a substrate, maintaining a pedestal temperature for an atomic layer deposition (ALD) process of less than 100° Celsius, forming at least one metal oxide layer over the first electrode, wherein the forming the at least one metal oxide layer is performed using the ALD process using a purge duration of less than 20 seconds, and forming a second electrode over the at least one metal oxide layer.