ALD Purge Cycle Tuning for Residual Precursor Defect Control

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Solution Overview

Problem

In semiconductor manufacturing, atomic layer deposition (ALD) processes using viscous precursors often result in residual material in gas lines, leading to defects on subsequent wafers due to incomplete purging, affecting process variability and efficiency.

Innovation Solution

A pre-fabrication methodology is employed to determine optimal purge cycle durations by analyzing defect deposition and thickness variations on blank wafers, ensuring minimal residual precursor material remains in the deposition system, thereby improving wafer-to-wafer consistency and process efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If purge cycle duration is extended to remove residual precursor material, then defect reduction is improved, but processing time increases

Engineering Contradiction:
Improvedefect reductionVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The methodology performs preliminary testing and characterization of precursor deposition behavior before actual production runs. By conducting test depositions and measuring residual material on blank wafers in advance, the system determines optimal purge parameters beforehand, avoiding the need for excessively long purge cycles during production while still achieving defect reduction.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where defect data and thickness measurement data from processed wafers are used to adjust and optimize purge cycle parameters. By monitoring the actual results and comparing them against targets, the system can refine purge durations to achieve the minimum effective time needed for defect reduction, rather than using fixed extended purge times.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If multiple test wafers are processed to determine optimal parameters, then parameter accuracy is improved, but productivity decreases

Engineering Contradiction:
Improveparameter accuracyVSAvoidwafer-per-hour processing rate
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The testing process is segmented into distinct phases: initial characterization tests on a limited number of blank wafers to establish baseline behavior, followed by parameter optimization tests. This segmentation allows the system to gather sufficient data for accurate parameter determination without requiring excessive test wafers, thereby balancing measurement precision with productivity concerns.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The methodology applies partial action by processing a limited but sufficient number of test wafers to obtain the necessary data for parameter determination, rather than processing excessive numbers. The system identifies the minimum number of test wafers needed to achieve statistical confidence in parameter optimization, avoiding unnecessary productivity loss while maintaining adequate measurement precision.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes defects and thickness deviations, enhancing the yield and efficiency of semiconductor fabrication by ensuring thorough purging and maintaining high wafer-per-hour processing rates, while extending equipment lifespan and reducing maintenance needs.

Implementation Method 1

performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer

Methodology Applied
Scientific EffectAtomic Layer Deposition: Chemical Vapour Deposition

Implementation Method 2

performing a first purge sub-cycle using a inert gas; performing a second purge sub-cycle for a first duration over a second blank wafer

Methodology Applied
Scientific EffectGas Purging: Convection

Implementation Method 3

leading to defects on subsequent wafers due to incomplete purging

Methodology Applied
Scientific EffectAdsorption: Adsorption

Data Source

PatentUS12087644B2Methods of determining process recipes and forming a semiconductor device
Publication Date: 2024.09.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12087644B2 patent drawing
  • US12087644B2 patent drawing
  • US12087644B2 patent drawing

AI summary

In an embodiment, a method includes performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer, the first ALD process comprising: performing a first precursor sub-cycle using a first precursor; performing a first purge sub-cycle using a inert gas; and performing a second precursor sub-cycle using a second precursor and the inert gas; and performing a second purge sub-cycle for a first duration over a second blank wafer different from the first blank wafer using the inert gas to deposit first defects onto the second blank wafer.