Fin Patterning With ALE to Prevent FinFET Bridge Defects
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Solution Overview
Problem
The shrinking dimensions of FinFET devices pose challenges such as fin-fin bridge issues and even/odd problems during pattern transfer, leading to bridge defects and reduced etch breakthrough ability, which are not effectively addressed by existing manufacturing processes.
Innovation Solution
The method involves forming mandrels with specific widths and using atomic layer etching (ALE) with controlled etchant gases like C4F6 and O2 to pattern semiconductor fins, optimizing spacer mask arrangements and etching conditions to mitigate bridge issues and achieve precise fin patterning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional etching processes are used for pattern transfer, then manufacturing simplicity is maintained, but fin-fin bridge defects occur and etch breakthrough ability is reduced at advanced technology nodes
Solution Approach 1:
The etching process is segmented into multiple sequential steps: forming mandrels with specific widths, depositing spacer masks, performing atomic layer etching to pattern fins, and selective removal of mandrels and spacers. This segmentation allows precise control at each stage to prevent bridge defects while maintaining manufacturing feasibility
Solution Approach 2:
Mandrels are formed in advance with optimized widths before fin patterning. The spacer masks are deposited and positioned beforehand to define the exact fin locations. These preliminary structures guide the etching process to achieve precise fin patterning and prevent bridge defects before they occur
2Productivity
If geometry size is decreased to increase functional density, then production efficiency and cost are improved, but fin-fin bridge issues and even/odd problems increase
Solution Approach 1:
The mandrel width is specifically optimized as a critical parameter to control fin spacing and prevent bridge defects at advanced technology nodes. The atomic layer etching process parameters are tuned to achieve precise material removal. These parameter changes enable scaling to smaller geometries while maintaining manufacturing precision and avoiding bridge issues
Solution Approach 2:
Conventional mechanical/photochemical etching is replaced with atomic layer etching, which uses sequential chemical deposition and removal at the atomic level. This substitution provides superior precision and control for patterning fins at advanced technology nodes, eliminating bridge defects and even/odd problems that plague conventional methods
3Manufacturing precision
If spacer mask arrangements are optimized to prevent bridge defects, then fin patterning precision is improved, but process complexity increases
Solution Approach 1:
Spacer masks serve as intermediary structures that mediate between the mandrels and the final fin pattern. They are deposited conformally on mandrels, then selectively removed to define fin locations. This intermediary approach simplifies the overall process by providing a self-aligned mechanism that reduces complexity compared to direct patterning methods
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances fin-fin space etchability, reduces bridge defects, and improves device performance by maintaining a wider process window and precise fin patterning, even at advanced technology nodes.
Implementation Method 1
patterning the material layer into a plurality of masks below the spacer masks, wherein patterning the material layer comprises an atomic layer etching (ALE) process
Implementation Method 2
using atomic layer etching (ALE) with controlled etchant gases like C4F6 and O2 to pattern semiconductor fins
Data Source
AI summary
A method for manufacturing a semiconductor device is provided. The method includes forming a material layer over a semiconductor substrate; forming a plurality of spacer masks over the material layer; patterning the material layer into a plurality of masks below the spacer masks, wherein patterning the material layer comprises an atomic layer etching (ALE) process; and etching the semiconductor substrate through the masks.