AlGaN Semiconductor Device Tilted Surface Polarization Management

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Solution Overview

Problem

Current semiconductor devices using nitride semiconductors face challenges in achieving a high threshold while maintaining low on-resistance, particularly in obtaining a normally-off characteristic with efficient polarization management.

Innovation Solution

The semiconductor device incorporates a layered structure with AlxGa1-xN layers, including a first layer with a tilted surface, a second layer with specific partial regions, and a third layer, along with an insulating layer, to manage polarization and enhance threshold voltage while maintaining low resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a nitride semiconductor device is designed to achieve a high threshold voltage for normally-off operation, then the threshold voltage increases, but the on-resistance increases as well

Engineering Contradiction:
Improvethreshold voltageVSAvoidon-resistance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating a tilted surface structure in specific regions of the nitride semiconductor layer. The tilt angle varies across different areas, with the third surface having a different tilt angle than the first and second surfaces. This localized structural modification enables different regions to have optimized electrical characteristics, achieving high threshold voltage in the gate region while maintaining low on-resistance in the source-drain region.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces asymmetry through the tilted surface configuration where the third surface is tilted at a different angle compared to the first and second surfaces. This asymmetric structure creates non-uniform polarization distribution across the device, allowing the gate region to experience higher effective polarization for threshold voltage enhancement while the channel region maintains optimal transport properties for low on-resistance.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If the polarization effect is enhanced to increase threshold voltage, then the threshold voltage increases, but the device complexity increases

Engineering Contradiction:
Improvethreshold voltageVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a tilted surface configuration instead of a flat surface, creating a curved or angled interface between the nitride semiconductor layer and the gate electrode. This curvature approach simplifies the overall device structure compared to adding multiple complex layers, as it achieves polarization enhancement through geometric modification of the existing layers rather than adding substantial structural complexity.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively increases the threshold voltage while reducing on-resistance, achieving a high threshold and low on-resistance characteristic suitable for normally-off operation by optimizing the polarization effects across the device layers.

Implementation Method 1

optimizing the polarization effects across the device layers

Methodology Applied
Scientific EffectPolarization: Polarisation

Data Source

PatentUS10475915B2Semiconductor device and method for manufacturing the same
Publication Date: 2019.11.12 KK TOSHIBA
  • US10475915B2 patent drawing
  • US10475915B2 patent drawing
  • US10475915B2 patent drawing

AI summary

According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first layer, a second layer, a third layer, and an insulating layer. A position of the third electrode is between a position of the first electrode and a position of the second electrode. The first layer includes at least one of Alx1Ga1-x1N (0<x1<1) or p-type Alz1Ga1-z1N (0≤z1<1) and has a first surface, a second surface, and a third surface. The second layer includes Alx2Ga1-x2N (0≤x2<1 and x2<x1) and includes a first partial region, a second partial region, and a third partial region. The third layer includes Alx3Ga1-x3N (0<x3<1 and x2<x3) and includes a fourth partial region, a fifth partial region, and a sixth partial region.